Re: [SI-LIST] : PCI bus impedance

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From: Wang Xiao-yun (wangxiaoyun@iname.com)
Date: Tue May 15 2001 - 19:19:43 PDT


Hello, George:
   I'm a bit confused with your explanation and here is my question.
   When a via is put on a transmission line of nominal 50 ohm, the impedance
at that point and only that point is changed and therefore the signal will see
an impedance mismatch at exactly the place where the via is. The rest of the
segments of the line still has 50 ohm impedance.
   I agree the manufacturing tolerance of the impedance will range around
+/- 10% at least, but it shouldn't be the reason to increase the impedance
because it does no help. The only thing I can do is to route the tracks with
50 ohm target and simulate them with manufacturing tolerance in mind.
   I also agree with you that lower impedance will induced less crosstalk, and
as a result I will be much more happy with a design with unique impedance of
50 ohm wherever possible. If I were asked to have some traces of 65 ohm, I
would like to find out wether it's really necessary. Sometimes you may even
have to do some extra work to accomplish it, for example, change your
stackup a bit.
   Comments are appreciated.

At 10:37 01-5-15 +0200, Georg Ramsch wrote:
>Hello Bhavesh !
>
>For bussed systems it is always to put into question, why using 50 ohm
>references.
>The advice from your vendor refers to the impact of via- and driver
>capacitance on the impedance of bussed lines.
>Including the capacitive impact of vias, a 65 ohm transmissionline will
>yield 50 ohms.
>
>As example:
>
>given a 50-Ohm asymetric stripline FR4 (4.5) with 310/420 um dielectric
>and 250um width / 35um thickness of copper,
>following results will be the outcome:
>
>Target impedance is 50 ohm. Production tolerances of pcb fabrication will
>lead to a mean variation of about +/-15%,
>so the range of the impedance will be from 43 - 60 ohm.
>
>Calculating the capacitive impact of the vias, impedance will drop to 40 -
>45 ohm (ref: 50 ohm line), dependant on the geometry of the vias.
>Adding the capacitve effect of the drivers (f.e. 8 pF), impedance will
>reach 25 ohm. So drivers at the ends of the line will "see" a 25 ohm line;
>drivers in between 12.5 ohm.
>
>Question to all others: as driver output resistance is less than 10 ohm,
>the line is "overdriven". Any rule, at which impedance limit the
>transmission line impedance affects the output waveform of the driver ??
>
>In general: the higher the target impedance and the capacitive load is,
>the wider is the drop of the impedance.
> From my experinece of designing bussed systems, it is not a big
> difference whether you try to achieve a target impedance of 50 ohm
>or 40 ohm. Lower impedance targets also decreases the effect of
>crosstalk-phenomenons.
>
>Any comments from other side ??
>
>Hope I could help you with my 0.02.
>
>CU
>
>Georg
>
>
>
>
>
>"Patel, Bhavesh" wrote:
>>Hi! Gurus, I was simulating a PCI bus with 50ohm trace impedance because we
>>generally try to keep on all our boards 50ohm single ended & 100ohm
>>differential(easy for the fab house). Now, the vendor says use 65ohm trace
>>impedance and I did simulations with 65ohm but I don't see much difference
>>i.e. not significant where I would say'YES' let's go to 65ohm. Also, if I
>>have to do 65ohm then it will eating up my routing layers because this bus
>>is confined to one section of my board.
>>I needed some feedback regarding this and whether it will really make or
>>break the PCI bus by going from 50ohm to 65ohm.
>>Thanks in advance
>>Bhavesh Patel
>>
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>
>Wang Xiao-yun
>Shanghai, China
>善守者藏于九地之下, 善攻者动于九天之上, 故能自保而全胜也.

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