**From:** Georg Ramsch (*Georg.Ramsch@t-online.de*)

**Date:** Wed May 16 2001 - 00:43:03 PDT

**Next message:**Ingraham, Andrew: "RE: [SI-LIST] : PCI bus impedance"**Previous message:**Wesley Wu: "[SI-LIST] : BGA Pkg Characterization"**In reply to:**Wang Xiao-yun: "Re: [SI-LIST] : PCI bus impedance"**Next in thread:**Patel, Bhavesh: "RE: [SI-LIST] : PCI bus impedance"

Hello Xiao !

Principally you are right; impedance "bumps" occur between 10-20 ohm at the vias

and 50 ohm on the transmission line.

But that is only really true for very short pulses (ex: TDR / 30 psec risetime ).

Longer risetimes cause waves to "ignore" such a "bumpy road"; or lets say bumps

become diffused as risetimes (resp. wavelenghts )

become longer.

A comparision to water waves may be very imaginative: assume a wave travelling

along a river. Short wide gaps of river width will not affect the propagation of

the wave, but longer ones (at least 1/20 of the wavelength) will have an impact.

Same you can do with plane wave effects (power planes / INoise); when throwing

stones in a pond with a certain frequency, you will get a wave interference

pattern, which may be similiar to what happens between Vcc-Gnd-planes when exited

by current injections.

At frequencies we regard, those capacitive bumps can be regarded as integral part

of the transmisssion line ( not valid for higher frequencies, where the length of

the capacitive impact is in the range of a wavelength; here you have to apply

3D-field solvers to get the real effects, which also include inductive and

resistive stray elements).

Looking upon a via as an integral capacitive part of a transmission line is a rule

of thumb for engineers to make live easier and get faster results.

Not everybody can afford 2D- or 3D-field solvers @ 20.000 $ and up for 1 license.

Just look upon this as a "cooking receipt" to get an instant result instead of

doing a biochemical analysis of the whole meal.

By the way: it will not matter, whether you choose a 40 ohm transmission line or

65 ohm transmission line; both will work as the "impedance"

of the line goes down to 25 / 12.5 ohm with the effects of the drivers

incorporated.

50 ohm is chosen by many people as this has been done since the last 50 years and

only a few put this into question.

Long ago, scientists found, that at 33 ohm the energy throughput for a cylidrical

transmission line is a maximum, but attenuation is best at 75 ohm.

As the transmitted energy and received energy had to be guided on the same line, a

good compromise was to choose 50 ohm as the "middle".

So thats an old rule, which may need a new interpretation for todays needs, as it

came into existence when copper pipes were used as transmission lines

and design tools were slegde hammers and pipe wrenches.

Look at Futurebus physical design: terminations are defined 33 ohm at both ends,

which will be the effective impedance of a transmission line with vias and driver

cap. icluded with this slotpitch and connector type.

From my point of view I would choose 40 ohm, as manufacturing tolerances are

decreasing their effects at this level. Production yield will go up, thickness of

pcb will go down, PCB will become cheaper.

Hope, this explains a little bit the background of bussed lines.

CU

Georg

Wang Xiao-yun wrote:

*> Hello, George:
*

*> I'm a bit confused with your explanation and here is my question.
*

*> When a via is put on a transmission line of nominal 50 ohm, the impedance
*

*> at that point and only that point is changed and therefore the signal will see
*

*> an impedance mismatch at exactly the place where the via is. The rest of the
*

*> segments of the line still has 50 ohm impedance.
*

*> I agree the manufacturing tolerance of the impedance will range around
*

*> +/- 10% at least, but it shouldn't be the reason to increase the impedance
*

*> because it does no help. The only thing I can do is to route the tracks with
*

*> 50 ohm target and simulate them with manufacturing tolerance in mind.
*

*> I also agree with you that lower impedance will induced less crosstalk, and
*

*> as a result I will be much more happy with a design with unique impedance of
*

*> 50 ohm wherever possible. If I were asked to have some traces of 65 ohm, I
*

*> would like to find out wether it's really necessary. Sometimes you may even
*

*> have to do some extra work to accomplish it, for example, change your
*

*> stackup a bit.
*

*> Comments are appreciated.
*

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**Next message:**Ingraham, Andrew: "RE: [SI-LIST] : PCI bus impedance"**Previous message:**Wesley Wu: "[SI-LIST] : BGA Pkg Characterization"**In reply to:**Wang Xiao-yun: "Re: [SI-LIST] : PCI bus impedance"**Next in thread:**Patel, Bhavesh: "RE: [SI-LIST] : PCI bus impedance"

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