[SI-LIST] : specctraquest timing question

About this list Date view Thread view Subject view Author view

From: Sampson, Scot (ssampson@sonusnet.com)
Date: Tue Mar 20 2001 - 11:16:38 PST


 Hi All

We are in the process of trying to perform timing analysis
based on specctraquest simulations to determine if we are in good bad
or other territory. At the start of this exercise the engineer
has a clock to out number that is made up of a clock to buffer
input delay and then a buffer delay into a test load. From the
simulations we have the delay of the buffer driving the desired
net. What we desire is the clock to receiver input number. At
a high level, this appears to be the clock to out number, minus
the buffer into the test load, plus the driver into the receiver in
question. Is the last of these three terms merely the worst of
switchrise+risedly or switchfall+falldly? Is the only way to get
the buffer into testload number running a sim with the buffer and
test load? Is the timing number we are looking for merely the
clock to out number plus the worst of settlerise/settlefall delay?

 Thanx for the help

 Scot

**** To unsubscribe from si-list or si-list-digest: send e-mail to
majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:11:17 PDT