nRF24L01 2.4 GHz 'CW Beacon' Control Firmware

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This document describes a PIC microcontroller firmware controlling a cheap nRF24L01+ (!) module. The purpose was building an ultra-low-power microwave beacon for antenna range tests, radio range coverage, and path attenuation on 2.4 GHz caused by trees, houses, etc compared to a radio link over 'unobstructed line of sight'.

Introduction
1. Design goals
Hardware and Beacon Control Firmware
Links

1. Introduction

Unfortunately, unlike higher-priced ISM transceiver modules, the nRF24L01+ chip doesn't have a true RSSI (Radio Signal Strength Indicator), only a single bit ("RPD = Received Power Detector) indicating signals above -64 dBm, of course only updated when the nRF24L01+ is in 'Receive' mode. More on that in the author's nRF24L01 Notes, linked at the end of this document.

1.1 Design goals

Run on a cheap, homebrew-friendly PIC16F628A, powered directly with a 3.6 V battery (without a voltage regulator, which would consume more current than the PIC in "Sleep mode with periodic wake-up via watchdog timer")
Extremely low power consumption, only a few microamps between 'times of activity'
Provide an ID in Morse code, detectable with a narrow-band receiver or SDR over a longer distance than the 250 kBit/sec "digital data" can achieve
Additionally send a short "digital data burst" (packet in the nRF24L01's proprietary format), decodable by another nRF41L01+ ("portable receiver")
Minimum number of hardware components
If possible (without drawing too much power) switch to RECEIVE shortly after the active TX timeslot, and check for the presence of a "carrier" or even a "digital data burst".
If possible, send feedback if the previous "digital data burst" was acknowledged by e.g. a portable receiver

2. Hardware and Beacon Control Firmware

2.1 Hardware, nRF24L01+ board interface, pinouts

Most of the nRFFrom the nRF24L01+ datasheet (Rev 1.0, page 11):

Intf. pin Name Pin function Description

1 VSS Power Ground (0V)

2 VDD Power Power Supply (+1.9V to +3.6V DC)

3 CE Digital Input Chip Enable Activates RX or TX mode

4 CSN Digital Input SPI Chip Select

5 SCK Digital Input SPI Clock

6 MOSI Digital Input SPI Slave Data Input

7 MISO Digital Output SPI Slave Data Output, with tri-state option

8 IRQ Digital Output Maskable interrupt pin. Active low

Intf. pin	Name	Pin function	Description
1	VSS	Power	Ground (0V)
2	VDD	Power	Power Supply (+1.9V to +3.6V DC)
3	CE	Digital Input	Chip Enable Activates RX or TX mode
4	CSN	Digital Input	SPI Chip Select
5	SCK	Digital Input	SPI Clock
6	MOSI	Digital Input	SPI Slave Data Input
7	MISO	Digital Output	SPI Slave Data Output, with tri-state option
8	IRQ	Digital Output	Maskable interrupt pin. Active low

2.2 Beacon Control Firmware

Structure of the MPLAB X projects (similar structure for multiple PIC types):


  nRF24_Control
   |
   |- Header Files
   |   |- Beacon.h
   |   |- CwGen.h
   |   |- main.h
   |   |- nRF24.h
   |   |- PIC18F_Drivers (also for PIC16F)
   |   |   |-  ClockSystem.h, fixed_address_memory.h, iop.h,
   |   |   |-  LowLevelTypes.h, micro_string.h, spi.h, sysconfig.h
   |   |   |-  half a dozen of USB header files
   |   |   |   (USB support is optional, so far only for PIC18F25F50)
   |   '- switches.h  (located in a project specific subdirectory,
   |                   e.g. switches_PIC16F628A or switches_PIC18F25J50)
   |- Important Files (created by MPLAB X, only an auto-generated makefile)
   |- Linker Files    (created by MPLAB X, but completely empty)
   |- Source Files
   |   |- Beacon.c
   |   |- CwGen.c
   |   |- main.c
   |   |- nRF24.c
   |   |- PIC18F_Drivers (also for PIC16F)
   |   |   |-  ClockSystem_PIC16F.c or ClockSystem_PIC18F.c
   |   |   |-  iop_PIC16F628A.c + iop_PIC16F628_asm.s (for PIC16F628A or PIC16F1845)
   |   |   |      or
   |   |   |   iop_PIC18FxxJ50.c (for the PIC18F25J50 variant)
   |   |   |-  micro_string.c, spi.c
   |   |   '-  half a dozen of USB driver- and descriptor modules
   |   |       (USB support is optional, so far only for PIC18F25J50)
   |   '- possible more project-specific modules in future
   |- Libraries  (created by MPLAB, empty since we don't use "libraries")
   |- Loadables  (what the heck ? created by the IDE, empty)

2.3 nRF24L01+ Test Results

In each cycle, the "Test Beacon" sent a short message in Morse code at 1 mW RF output power, followed by four unmodulated "power" steps at 0 dBm, -6 dBm, -12 dBm, and -18 dBm (these are actually all power levels configurable in an nRF24L01+).
After that (near the end of the cycle), the beacon firmware sent a burst of packets, with the entire 32-byte "payload" filled with 0x55 as test pattern (to maximize the number of transitions between the two FSK tones).

Since the nRF24L01+ uses GFSK (Gaussion-shaped Frequency Shift Keying), not GMSK (Gaussian Minimum Shift Keying). The modulation index 'm' was not specified in the 'nRF24L01+ Product Specification' V1.0.

Spectrum emitted by an nRF24L01+ during a burst of messages at 250 kbps
at 1 mW, using a board without the "PA+LNA" chip.

The lower part of the spectrogram shows the beacon's last "power step", (CW carrier) sent at -18 dBm.
The CW carrier frequency was not centered in the GFSK spectrum, possibly because the 16 MHz crystal oscillator suffered from power-dependent heating of the nRF24L01, despite using a "good" voltage regulator for the 3.3 V supply (TPS7A533PDBZR, with a neglectable quiescent current).

Note: Despite being a kind of FSK, GFSK is not a modulation with 'constant' amplitude (this is caused by the Gaussian pulse shaping). With a non-linear power amplifier, the spectrum gets broader, and spills into other radio frequency channels.
Such an effect could be observed with one of the poor, unshielded "nRF24L01 + PA + LNA" modules with chips of questionable origin (not the good shielded ones from EBYTE, which appeared to use genuine chips).