RE: [SI-LIST] : CHIP INDUCTOR Q AND L AS FUNCTION OF ORIENTATION?

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From: Ken Cantrell ([email protected])
Date: Thu Feb 22 2001 - 08:28:01 PST

RE: [SI-LIST] : CHIP INDUCTOR Q AND L AS FUNCTION OF ORIENTATION?All,
I ran across a paper by Harada, Sasaki, and Kami in the IEICE transactions
that concluded that the number of vias per pad had a significantly greater
effect on reducing inductance than the pad size/orientation. That is,
given good pad construction as detailed in the Roy, Smith, and Prymak,
increasing the pad size, or width to length ratio has less effect on
reducing the mounted inductance than adding more vias. Harad, Sasaki, and
Kami had typical reduction values of 500pF for configurations studied.
IEICE Trans. Commun., Vol E83-B, No. 3, March 2000: "Controlling
Power-Distribution Plane Resonance in Multilayer Printed Circuit Boards",
Takashi Harada, Hideki Sasaki, and Yoshio Kami.

Roy, Smith and Prymak do not discuss ringing effects of low ESR caps. Does
anyone have any data/papers on that?
Ken
-----Original Message-----
From: [email protected]
[mailto:[email protected]]On Behalf Of Cruz, Jose
Sent: Thursday, February 22, 2001 8:11 AM
To: 'Kai Keskinen'; '[email protected]'
Subject: RE: [SI-LIST] : CHIP INDUCTOR Q AND L AS FUNCTION OF ORIENTATION?

-----Original Message-----
From: Kai Keskinen [mailto:[email protected]]
Sent: Thursday, February 22, 2001 8:02 AM
To: '[email protected]'
Subject: RE: [SI-LIST] : CHIP INDUCTOR Q AND L AS FUNCTION OF ORIENTATION?

See the paper by Tanmoy Roy, Larry Smith, and John Prymak called ESR and ESL
of Ceramic Capacitor Applied to Decoupling Applications.

Kai Keskinen
Equipment and Network Interconnect
Nortel Subsystems and Performance Networks (NSPaN)
(613)-765-3506 (ESN 395)
[email protected]

  -----Original Message-----
  From: Steve Rogers [SMTP:[email protected]]
  Sent: Thursday, February 22, 2001 6:27 AM
  To: '[email protected]'
  Subject: [SI-LIST] : CHIP INDUCTOR Q AND L AS FUNCTION OF
ORIENTATION?

  I have recently read an article which suggests that the Q and Inductance
of
  many chip inductors will differ depending upon
  which way up the inductor is mounted. Would anyone care to comment on
this?

  Thanks in advance

  SGR

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