[SI-LIST] : ground bounce evaluation ??

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From: adeel.ahmad@st.com
Date: Mon Jan 22 2001 - 21:47:35 PST

hello all !

i have some confusion regarding how to evaluate the ground bounce for a
3.3V CMOS output buffer-
* i think it is important to not only reduce the max ground bounce
amplitude but also consider the spike width(time duration). but what is
the acceptable "spike volt-width product"(as i would prefer to coin it
so is there any such parameter whereby a ground bounce spike of higher
value but of short duration(width) is tolerable?

*what is the most basic criterion that limits the peak of ground bounce-
is it simply the noise reflected on a quiet output with same dirty GND or
the Vil(max) of an input buffer if it shares the same dirty ground.

Associate Design Engineer
STMicroelecronics Ltd,INDIA
email- adeel.ahmad@st.com

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