RE: [SI-LIST] : FW: Spectraquest Vs. XTK/XNS

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From: ^lY (Peng.Smith@inventec.com)
Date: Wed Oct 04 2000 - 23:58:51 PDT


Heiko,
        From your response about your simulation software which can
estimate/calculate/approach the differential-mode and common-mode emissions
based on SigXp and Power plane Designer tools respectively, I'm very curious
about it because we are a SQ user and using the SigXp for SI pre-sim. But we
don't know how to do the differential-mode emission in SigXp because SigXp
can not deal with the return path problem (including split plane) and it
considers an ideal plane for signal reference according to my understanding.

        Yes, SigXp uses the so called "method of moments", but it doesn't
mean it can do the Power/Gnd plane noise problems, such as the return path
mentioned by you. This is because we have to use more accurate and
complicated plane model to express the equipment circuit, then implement
into simulator for further simulation. So, we can get the exact prediction
for EMC/EMI cure, otherwise it's just a lemon. The another issue is that the
simulation time you expend. As we know, it will take much time for Power/Gnd
plane noise simulation, even for one net. But in SigXp, it doesn't take much
time to get one net simulation (SI waveform, not noise waveform). So that's
why I'm so curious and suspected. Can you explain it in detail, meanwhile,
how long does it (SigXp/Power plane Design) take for noise return path of
one very simple net??

Best regards
Smith Peng
Email: peng.smith@inventec.com <mailto:peng.smith@inventec.com>
Tel: 886-3-3900000 ext. 2152

-----Original Message-----
From: Heiko Dudek [mailto:heikod@cadence.com]
Sent: Thursday, October 05, 2000 6:22 AM
To: Ken Cantrell; Jim Freeman; Donald Telian
Cc: May, John; si-list@silab.eng.sun.com
Subject: RE: [SI-LIST] : FW: Spectraquest Vs. XTK/XNS

Ken,

I slightly disagree ... let me explain.

The differentiation between common and differential mode emissions has a
very practical
background: the radiation from PCB structures can be categorized into
differential mode
and common mode emitters (I think this was first introduced by W. L. Weeks
in Electro-
magnetic Theory for Engineering Applications? Wiley, 1964). A current loop
'antenna'
would be an emitter for differential mode emissions and a dipole or point
source 'antenna'
would be a common mode emitter. Differential mode emissions are relatively
easy to handle
even as a pre-layout estimation (SPECCTRAQuest SigXp can do this for you),
since the
loop area (formed by the signal path - the trace - and the return path -
somewhere on the
reference plane(s)) - as well as frequency and loop current (signal current,
calculated in a
standard SI simulation) can be determined. Dipole emitters (e.g. the voltage
drop along a
return current path on reference plane structure building dipoles at the
edges of a cut-out
or similar things happening in peripheral (conducting components around the
PCB) are
way more complicated to model. SPECCTRAQuest uses a 'method of moments'
approach
to calculate (both differential and common mode) emissions (you can actually
get the near-
field results as well as the far-field emissions) - while not taking
anything else into account
than the PCB itself.
And here's where I disagree. Cables are not the origin for common mode
emissions, they are
just the emitters (the 'antennas' for TEM waves between reference planes,
exited by point
source antennas - large switching currents through vias connecting pwr / gnd
to decaps /
comps - if you like). So the real evil to fight is SSN - or, in other words,
get your power supply
decoupled correctly. For this purpose we recently announced SQ Power Plane
Designer,
it's a DESIGN approach (vs post-layout verification) to get decoupling
right.

  - Heiko

At 10:19 AM 10/3/00 -0600, Ken Cantrell wrote:
>Donald,
>Correct me if I'm wrong (Jim), but SQuest, or any of the other vendors
other
>than Innoveda(Quiet Ext), only do a differential mode emissions analysis.
>This means that you are not able to analyze the Vcm created between the
>board and the cable(s), where most of your emissions issues come from.
>Don't get me wrong, I'm not pro-Innoveda either, I'm just a user. There
are
>issues with all of the packages. Innoveda XTK is antiquated and hard to
>use, plus you have to buy XTK to support Quiet and AC/Grade. They should
>have an XTK lite so that the user has a choice, or make Quiet and AC/Grade
>stand alone. SQuest, HyperLynx, and ICX are more user friendly, but don't
>do common mode. HyperLynx (PADS and Innoveda merged, so HyperLynx is under
>the Innoveda banner now), deserves special note. If you are not designing
>chips, just doing boards, it is the most user friendly and intuitive tool
>out there, and it will do 90% of what you need to do at about 10% of the
>cost. If you are in a multiple product line, manufacturing driven
>situation, and are using Cadence, SQuest has a lot of elements that will
>make your life easier. They make the most highly integrated (with CAD,
Mfg,
>and design)package. I also like the agressive pricing that Cadence started
>about a year ago. They give you a lot of bang for the buck. I haven't had
>the chance to review Mentor ICX yet, hopefully later this month. I've had
>problems just getting the package in, both in Seattle and Springs. They
>seem to be responsive on the phone or e-mail, but there is a disconnect
>there somewhere. I have reviewed their FPGA sim pak, Advantage, and it is
>very good. Detailed, but easy to use. I'm hoping their SI pak is as good.
>User to user, Donald, the EDA industry is extremely competitive right now.
>Each vendor leap-frogs the other just about every couple of months on
>feature sets. I used to go for getting everything from one vendor, but now
>I'm mixing and matching, typically doing the one year lease instead of the
>lifetime buy.
>Ken
>Sim Manager
>SRC Computers
>
>-----Original Message-----
>From: owner-si-list@silab.eng.sun.com
>[mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Jim Freeman
>Sent: Monday, October 02, 2000 7:53 PM
>To: Donald Telian
>Cc: May, John; 'si-list@silab.eng.sun.com'
>Subject: Re: [SI-LIST] : FW: Spectraquest Vs. XTK/XNS
>
>
>
>The problem is that the Hspice models are using the M format.
>
>Jim Freeman
>
>
>Donald Telian wrote:
>
> > John,
> >
> > Answers for SPECCTRAQuest are below.
> >
> > Thanks for asking,
> > Donald T.
> > CADENCE
> >
> > At 01:48 PM 9/25/00 -0400, May, John wrote:
> > >
> > >
> > >> -----Original Message-----
> > >> From: May, John
> > >> Sent: Monday, September 25, 2000 1:20 PM
> > >> To: 'si-list@silba.eng.sun.com'
> > >> Subject: Spectraquest Vs. XTK/XNS
> > >>
> > >> Hi all - My group is looking into purchasing one of these tool suites
>for
> > >> SI analysis. I'm wondering what the tradeoffs and limitations of each
>are.
> > >> For instance:
> > >>
> > >> 1) Can botth suites handle HSPICE models in a mixed environment with
>IBIS
> > >> models?
> > >>
> >
> > SPECCTRAQuest uses an optimized spice engine for analysis. As such, all
> > types of spice models can be used with the exception of transistor-based
> > models (M elements). Naturally, IBIS models can be used as well. If
you
> > want to use both IBIS and transistor-level IO models, we have a netlist
> > converter that will translate our proprietary spice netlist (extracted
>from
> > PCB layouts or topology drawings) into a variety of other spice formats.
> >
> > >> 2) Do either of the tools have trouble with differential inputs(high
>and
> > >> low inputs used with a differential receiver)?
> > >>
> >
> > SPECCTRAQuest has support for differential drivers and receivers.
> >
> > >> 3) Connector stitching: How easy is it to use these tools for going
> > >> through connectors to model paths that traverse multiple modules?
> > >>
> >
> > It is quite simple to join multiple board layout files together in
> > SPECCTRAQuest for simulation. And that includes package layout (.mcm)
> > files as well. A variety of connector or cable models can be easily
>placed
> > between the boards. The simplest being RLC or RLGC representations, but
> > fully-coupled connector models can also be integrated into the
simulation.
> > This normally requires some re-formatting of the data from the connector
> > vendor, but it is not too hard to do assuming you understand how to
build
> > and call spice subcircuits.
> >
> > >> John
> > >
> > >**** To unsubscribe from si-list or si-list-digest: send e-mail to
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> > >****
> > >
> > >
> > >
> > Donald Telian
> > Cadence Design Systems
> > phone: 408-944-7791
> > donaldt@cadence.com
> >
> > **** To unsubscribe from si-list or si-list-digest: send e-mail to
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>
>
>**** To unsubscribe from si-list or si-list-digest: send e-mail to
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>
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     Heiko Dudek
     Technical Marketing Manager | High Speed Systems Design & IC Packaging
     Cadence Design Systems | 270 Billerica Road | Chelmsford, MA 01824
     
     ph: (978) 262-6384
     fx: (978) 446-6798
     email: heikod@cadence.com

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