Re: [SI-LIST] : PCI speedway

About this list Date view Thread view Subject view Author view

From: Michael Nudelman (mnudelman@tellium.com)
Date: Wed Sep 27 2000 - 13:31:25 PDT


George, Angelo:

This is the link to the book.

http://www.amazon.com/exec/obidos/ASIN/0201309742/o/qid=970086193/sr=2-2/102-6005797-8514538

liquadri@aethra.it wrote:

> Hi Mike, Hi Erich
> Thank for your answers. Of coarse I am interested the name of the book.
> I am following the "classic? topology suggests by EDN article and HSPICE
> internet manual: a band of PCI traces with PCI devices on both sides connect
> with short stubs to speedway. In my previous designs I used the daisy chain
> topology for high speed non PCI bus, with good results. Using the daisy chain
> solution in this new PCI design, the bus length is more than 15inch. So I would
> like to find a skilled guideline about the speedway.
> Do you include the test connector capacitive load in your capacitive budget for
> PCI transmission line ?
> Sorry for my English.
>
> Thanks again
> Ciao Angelo
>
> Michael Nudelman <mnudelman@tellium.com> on 27/09/2000 14.15.53
>
> Please respond to Michael Nudelman <mnudelman@tellium.com>
>
> To: Angelo Li Quadri Cassini/AETHRA@AELOTUS
> cc: si-list@silab.eng.sun.com
> Subject: Re: [SI-LIST] : PCI speedway
>
> ------------------------------------------------------------------------
>
> I'll look up the name of the book I have at home; this is the best book for the
> PCI
> design I ever saw and I used it in my design.
>
> The PCI bus is fairly tolerant at 33MHz. I stretched it for almost 18 inches
> with
> one north bridge and it worked reliably, though it was a necessity. If you can
> use a
> "slave" bridge to cut the bus in half (again, if your bus becomes very long) -
> do
> it.
>
> The layout is simple - fairly uniform bus, no stubs; de-scewed clock, for which
> I
> personally would recommend Cypress Robo-Clock drivers.
>
> Advise: do put a test header for a digital analyzer on all PCI signals; PCI
> protocol
> is fascinating and sometimes without analyzer you won't get far.
>
> Mike.
>
> liquadri@aethra.it wrote:
>
> > Hi , Guy
> >
> > somebody can help me to looking for real example to PCI speedway layout and
> > component placing ?
> > I know the EDN article (november 1994) about this issue and the abstract to
> Star
> > ?Hspice manual.
> >
> > thanks for your help
> > Ciao Angelo
> >
> > **** To unsubscribe from si-list or si-list-digest: send e-mail to
> > majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
> > si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
> > si-list archives are accessible at http://www.qsl.net/wb6tpu
> > ****
>
> **** To unsubscribe from si-list or si-list-digest: send e-mail to
> majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
> si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
> si-list archives are accessible at http://www.qsl.net/wb6tpu
> ****

**** To unsubscribe from si-list or si-list-digest: send e-mail to
majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:29:35 PDT