RE: [SI-LIST] : IBIS datasheets for PCI and DDR

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From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Tue Nov 16 1999 - 12:18:07 PST


You missed another one...

SPICE models represent an actual buffer, not the entire range of a spec.
So if you want to see what let's say a board design does with all possible
PCI buffers that could possible be (legally) manufactured, i.e. the spec,
you need to have a model that represents the spec. and not your buffer
only. In general, this is called what if-ing. A lot easier with
behavioral models than SPICE models...

Arpad Muranyi
Intel Corporation
==================================================================

-----Original Message-----
From: Krull, Nick J [mailto:KrullNJ@LOUISVILLE.STORTEK.COM]
Sent: Tuesday, November 16, 1999 11:34 AM
To: si-list@silab.eng.sun.com
Subject: RE: [SI-LIST] : IBIS datasheets for PCI and DDR

you missed one
cumbersome, slow, if not impossible, setup of a board level simulations...
Nick Krull, STK/Applied Electronics

-----Original Message-----
From: Scott McMorrow [mailto:scott@vasthorizons.com]
Sent: Tuesday, November 16, 1999 12:09 PM
To: si-list@silab.eng.sun.com
Subject: Re: [SI-LIST] : IBIS datasheets for PCI and DDR

Chris Cheng wrote:

 <http://www.micron.com/mti/msp/models/index.html>
spice only for DDR i/o but then again, why do
u need ibis if u have the full spice......

Lets see ...
Faster performance in simulation by 10-100X ...
Encapsulation of standard measurement points ...
Encapsulation of package parameters ...
Equivalent or better accuracy depending on method of
creating and characterizing the model ...
More widespread simulator support.

Hmmm ... I can't imagine what the need or desire for
IBIS models would be.

regards,

scott
  

-- 
Scott McMorrow 
Principal Engineer 
SiQual, Signal Quality Engineering 
18735 SW Boones Ferry Road 
Tualatin, OR  97062-3090 
(503) 885-1231 
http://www.siqual.com <http://www.siqual.com>  
  

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