[SI-LIST] : Transient impedance

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From: Sandy Taylor (cmos@rockisland.com)
Date: Mon Nov 15 1999 - 17:48:00 PST


"D. C. Sessions" wrote:

> As a general rule, ...

I never did like general rules.

> we design output stages to keep the crowbar current low.
> Break-before-make, as it were, although it's no exactly sequenced so much
> as just turning off faster than on. Necessarily, though, the output goes
> through a high-impedance point.

When signal fidelity is critical quite a bit can be done to make cmos circuits
behave better. As you "feel the need for speed" you can add:

- slew rate control
- linearized output impedance (~constant output over varying output voltage)
- impedance control over PVT, matching an external resistor
- smooth break as make to maintain constant impedance during switching.

The good news (for the chip designers) is that the mos devices are improving
faster than the bus speeds increase. This gives us more flexibility to add
full blown analog circuits on the IO pins. More on this at ISSCC,
including some schematics.

Sandy Taylor
CMOS Solutions

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