Re: [SI-LIST] : Assistance with Quad model..

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From: Syed Huq (shuq@cisco.com)
Date: Fri Nov 12 1999 - 16:50:40 PST


Charles,

I am sure there are many ways to do this. Try the following:
Create a file called 'pkg.mod' and insert the following in the file.
------------------------------------------
TOPSPEC PKG
NODE 1 C1 TYPE CAP_2 # Cap to GND
SERIES 1 R1 TYPE RES # Series R
ENDTOPSPEC

LOADSPEC CAP_2
CEFF: 2.0 # Your value of Cap
VEFF: 0.0

LOADSPEC RES
REFF: 0.2 # Your value of Res
-------------------------------------------

Regards,
Syed
Cisco Systems, Inc

> Date: Fri, 12 Nov 1999 15:33:45 -0800
> From: "Phares, Charles" <charles.c.phares@intel.com>
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> Subject: [SI-LIST] : Assistance with Quad model..
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> quad users,
>
> I am trying to create a model to use in quad to approximate the "on"
> resistance and pin capacitance of essentially a cmos transmission gate.
> ascii schematically it looks like:
>
> in -------------/\/\/\/\/\/\----------------out
> | r
> |
> = = = c
> |
> |
> gnd
>
> I was hoping that it would be as simple as putting the following
> statements
> in a model file:
>
> MODEL R_1
> PIN 1 TYPE RES_VAL TO PIN 2
> PIN 1 TYPE CAP_PAR
> END_MODEL
>
> LOADSPEC RES_VAL
> REFF: 10
>
> LOADSPEC CAP_PAR
> CEFF: 3.5
>
> But, unfortunately, the TOP file only reads the series resistance
> parameter
> and leaves out the cap. I guess it just doesn't like the dual pin
> definition. It doesn't give me an error though.
>
> Can anyone think of a slick way to make this model, using TOPSPEC or
> something like that?
>
> Thanks,
> Charles Phares
>
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