Re: [SI-LIST] : Clean sheet of paper

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From: Vinu Arumugham (vinu@cisco.com)
Date: Wed Dec 22 1999 - 17:38:11 PST


One (painful) option may be to double the number of resistors and use a thevenin termination.

We did not find any power supplies with sink and source capability. Our power supply folks designed a linear shunt/parallel regulator circuit to generate
the SSTL termination voltage.

Vinu

"D. C. Sessions" wrote:

> Bruce Rosenquist wrote:
> >
> > I was skimming the latest SI news, and your final comment caught my interest.
> > I am new to high-speed issues and controlling board impedances, and working
> > on a design which contains a lot of parallel termination for LVPECL signals.
> > This requires a termination voltage, which must, as you say, both sink and source current.
> >
> > How do the pros typically do this? Are there any DC-DC converters that are made
> > specifically for this function? What are some of the nasties you speak of ?
> > What are the tricks ?
>
> You'll notice the deafening silence. Economical, powerful Class A
> or AB amplifiers aren't exactly cheap. Switching power supplies do
> a great job sourcing power but don't absorb it worth spit.
>
> With SSTL becoming mainstream memory technology the support-chip
> outfits will be coming out with some devices to address this but
> it's not going to be pretty. Essentially you can do the job sort
> of efficiently by putting a rail-to-rail PWM into an LC filter,
> no rectifier needed.
>
> > D. C. Sessions wrote:
>
> [...]
>
> > > * It should be economical. Wasted power is a Bad Thing, so low
> > > swing is a must. Padrings are some of the most expensive real
> > > estate around, so pincount should be minimized. Line termination
> > > can dominate a PWB so KISS is the rule. Power supplies (esp.
> > > ones that can both sink and source current) are expensive and
> > > nasty to deal with, so do without (both for termination and
> > > funny analog functions in the I/O circuits.)
>
> --
> D. C. Sessions
> dc.sessions@vlsi.com
>
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