RE: [SI-LIST] : RE: Another decoupling question

Chris Cheng (hycheng@3pardata.com)
Fri, 17 Sep 1999 13:51:36 -0700

for ~10nf, you are better of putting it insider the die. (yes, on
die decouping)
chris

> -----Original Message-----
> From: owner-si-list@silab.eng.sun.com
> [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Dr. Edward P. Sayre
> Sent: Friday, September 17, 1999 12:33 PM
> To: si-list@silab.eng.sun.com, "Mellitz, Richard";
> 'si-list@silab.eng.sun.com, "Greim, Michael"'; Volk, Andrew M;
> 'si-list@silab.eng.sun.com'
> Subject: RE: [SI-LIST] : RE: Another decoupling question
>
>
> Rich:
>
> Try some of the research done at RPI by Professor Jack MacDonald on the
> subject
>
> ed sayre
> ===========
> At 08:26 AM 9/16/99 -0700, Mellitz, Richard wrote:
> >How about a barium titinate layer (Dk~100) between power and ground in a
> >multilayer ceramic package? It should get you about 20 nF or so?
> >Is anyone doing this?
> >
> >... Rich Mellitz
> >Intel
> >
> > -----Original Message-----
> > From: Greim, Michael [mailto:mgreim@mc.com]
> > Sent: Thursday, September 16, 1999 8:50 AM
> > To: 'si-list@silab.eng.sun.com, "Volk, Andrew M"';
> >'si-list@silab.eng.sun.com'
> > Subject: [SI-LIST] : RE: Another decoupling question
> >
> > I can appreciate the value of that, however, I would think
> >that
> > most manufacturing folks would run kicking and screaming
> > from a multi-stage assembly approach. What happens when
> > the caps fail as a short. You end up having to pull
> >up/reball
> > and perhaps scrap a potentially expensive BGA to save the
> > .01 cent capacitor.
> >
> > From a manufacturability perspective, I would advocate
> >getting
> > as close as possible to the outer edge of the chip and
> >decoupling
> > on the opposite side of the board. Chips on top of chips is
> >a
> > bad idea. IMHO.
> >
> > Michael C. Greim
> >Consulting Engineer
> > Mercury Computer Systems, Inc email: mgreim@mc.com
> > 199 Riverneck Road V:
> > 978-256-0052/x1607
> > Chelmsford, MA 01824-2820 F:
> >978-256-4778
> >
> > > -----Original Message-----
> > > From: Volk, Andrew M [SMTP:andrew.m.volk@intel.com]
> > > Sent: Wednesday, September 15, 1999 5:04 PM
> > > To: 'si-list@silab.eng.sun.com'
> > > Subject: RE: Another decoupling question
> > >
> > > SI Listeners -
> > >
> > > Another question on decoupling. I have recently heard
> >about capacitors
> > > that are supposedly thin enough to fit under a standard
> >MBGA package
> > > (Novacap for one). This would give excellent decoupling
> >as it is close to
> > > the package power balls, but still mounts on the top of
> >the board avoiding
> > > backside components.
> > >
> > > Has anyone had any experience with this type of device and
> >this kind of
> > > manufacturing step (cap under BGA package)?
> > >
> > > Andrew Volk
> > > Intel Corp.
> >
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>
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> | NORTH EAST SYSTEMS ASSOCIATES, INC. |
> | ------------------------------------- |
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