Re: [SI-LIST] : Clue-by-four (was OVERSHOOT ... RATING)

raymondl@qsa.qualitysemi.com
Wed, 28 Jul 1999 14:07:36 +1000

I can agree no more in this issue. Ground bounce, edge rate, equivalent o/p
resistance,
testing spec., ESD ... When there is a demand there will be the supply :-).

Raymond

"D. C. Sessions" <dc.sessions@vlsi.com> on 28/07/99 06:04:28

Please respond to si-list@silab.eng.sun.com

To: si-list@silab.eng.sun.com
cc: (bcc: Raymond Leung/QSA/AU)

Subject: [SI-LIST] : Clue-by-four (was OVERSHOOT ... RATING)

jrbarnes@lexmark.com wrote:

> As a board designer, I do not have much clout with the chip designers.

This is scary. I'm the I/O designer, and *I* don't have much clout with
the chip designers, and I are one. Usually I'm told that we can't do things
right because the customers (Yes, I mean you) won't tolerate it.

Until you guys find the right clue-by-four to disabuse OUR guys of this
notion we're all in trouble. I wasn't kidding when I invited you to get
rough with our marketing and sales suits -- the ONLY way we'll get
permission to do what we know is necessary is if they are in fear of
losing design wins.

> Even
if
> I did they are constrained by the technology they want to use for many other
> reasons.

There are more things in Heaven and Earth, Horatio,
than are dreamt of in your philosophy.

I wouldn't say that there isn't ANYTHING we can't do, but generally it's
much more likely to be a failure of will than a failure of technology.
I know that there are at least a few other I/O designers reading, so let's
take a straw poll: can you think of any practical SI features that
Just Can't Be Done?

--
D. C. Sessions
dc.sessions@vlsi.com

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