Re: [SI-LIST] : DDR SDRAM without parallel termination ?

About this list Date view Thread view Subject view Author view

From: D. C. Sessions (si-list@lumbercartel.com)
Date: Tue May 29 2001 - 11:15:31 PDT


On Tuesday 29 May 2001 09:54, Stuart Adams wrote:
> Anyone successfully used or simulated DDR SDRAMs
> without parallel termination ???
>
> I have an embedded design with 2 banks of four x16
> devices on one DDR bus and second completely separate
> DDR SDRAM bus with a single DDR SODIMM on it.

That two-deep bus is going to be your headache. Use x8 devices
one deep and you may be able to make this work.

> I would like to avoid using parallel termination
> if possible to save space/power and get rid of
> the Vtt regulator.

Reflected-wave operation is the standard setup for graphics applications,
but the trick is that they run the data bus strictly point-to-point. If (big if)
you can keep the lines REALLY, REALLY short and hold down the controller
edge rates (DRAMs are inherently slow as molasses) you may be abel to
do without resistors.

A safer bet is to put a single resistor halfway down the line to damp the
reflections.

There is work going on to specifically cover reflected-wave operation in
SSTL, but it's not an easy problem.

-- 
| The race is not always to the swift, nor the battle to the strong. |
| Because the slow, feeble old codgers like me cheat.                |
+--------------- D. C. Sessions <dcs@lumbercartel.com> --------------+

**** To unsubscribe from si-list or si-list-digest: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:12:10 PDT