From: Stuart Adams (email@example.com)
Date: Tue May 29 2001 - 09:54:46 PDT
Anyone successfully used or simulated DDR SDRAMs
without parallel termination ???
I have an embedded design with 2 banks of four x16
devices on one DDR bus and second completely separate
DDR SDRAM bus with a single DDR SODIMM on it.
I would like to avoid using parallel termination
if possible to save space/power and get rid of
the Vtt regulator.
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This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:12:10 PDT