RE: [SI-LIST] : Package power rating

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From: Larry Miller (ldmiller@rhapsodynetworks.com)
Date: Mon May 21 2001 - 13:33:35 PDT


The package rating is a (thermal) system issue. The limiting factor in most
cases is the junction temperatures of the IC transistors. Most ASIC houses
have elaborate means for determining the thetas (thermal coefficients, deg
c/watt) all the way through the package.

There are numerous dodges for improving a package, such as heat spreaders
(metal pieces) embedded inside the package. Some ICs such as the PowerPC
actually have temperature monitoring circuits and control systems built into
the chip to allow for short bursts of hyper speed (since thermal time
constants are relatively long) while maintaining the average speed, power
dissipation and hence temperature. And the balls in the middle of a BGA
pattern are for heat conduction as much as anything.

External heat sinks on the top side of a package add another whole
dimension, ranging from the glue-on fin arrays to putting the whole circuit
inside a casting that uses heat conductive compounds to achieve a 3 deg
c/watt transfer coefficient from the package surface to the outside air
(common in Telco gear).

So I guess I would have to assert that there is no definitive industry
standard for a given package; this is a highly individual case-by-case
design issue and an art unto itself. Typically the design is based upon
empirical measurements (like measuring base-emitter junction voltages) and
confirmation in test-to-destruction tests.

Finally, of course, you have to consider the ambient temperature conditions.

The vendors' package ratings are only a first swing at the problem if you
are pushing the envelope as is common these days.

Larry Miller

-----Original Message-----
From: Zabinski, Patrick J. [mailto:zabinski.patrick@mayo.edu]
Sent: Monday, May 21, 2001 12:04 PM
To: si-list@silab.eng.sun.com
Subject: RE: [SI-LIST] : Package power rating

Yuan,

If there is a definitive answer, I'd like to hear it as well.

I've seen vendors rate their packages' power handling ability
on such things as:

        * how hot can it get before it delaminates/melts;
        * thermal conductivity between die attach area to backside;
        * simple surface are of package backside; and/or
        * what's the hottest chip someone has ever put in their package.

If there is some industry-standard along these lines, I'd like to
see it.

Pat

> A seemingly trivial question: how to verify how much power a
> package can
> handle? Is it power cycling? Or Device functional testing? Or else?
>
> Any suggestions?
>
> Thanks,
>
> Yuan
>

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