RE: [SI-LIST] : Re: Open-sink ibis model

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From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Mon Apr 02 2001 - 12:54:46 PDT


Jason,

The first thing you can do is this: Run a simulation
into a resistor that is connected to the same voltage
as the V_fixture parameter in the waveform section of
the IBIS model.

If the simulated waveform does not resemble the waveform
in the IBIS model itself, you have a bad model or bad
simulator.

Arpad Muranyi
Intel Corporation
=============================================================

-----Original Message-----
From: Jason Leung [mailto:jleung@cid.alcatel.com]
Sent: Friday, March 30, 2001 1:43 PM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : Re: Open-sink ibis model

Hi Guys:
I am trying to verify a IBIS model that consists of a open-sink device,
when I use the regular
schematics( i.e. a driver, and a 50 ohms termination in scratchpad ), I
am getting some weird waveform.
Does anyone here know how should I test and verify this IBIS models of a
open-sink device.

Thanks in advance
Best Regards
Jason Leung

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