From: Michael Nudelman ([email protected])
Date: Tue Mar 13 2001 - 05:50:58 PST
Su Ming,
The non-monotonic edges may or may not compromise you signal integrity; the
address lines, while not edge-sensitive, by itself do not do anything bad
'till the point where due to transitions into "grey zone" and back the setup
times are violated; same goes for control signals. YOu really have to see
where non-monotonic effets occur and how close they are to the point of the
minimum set-up time.
Mike.
-----Original Message-----
From: Su Ming TAI [mailto:[email protected]]
Sent: Tuesday, March 13, 2001 12:32
To: [email protected]
Subject: [SI-LIST] : controller<=>memory non-monotonic issues
Dear SI gurus,
There are some issues concerning the controller<=>memory that some of you
may be able to help me with.
The design is a controller connected to two SO-DIMMs.
SO-DIMM1 is a 256MB and SO-DIMM2 is a 64MB. Clock is rated at 80 MHz and
max delay is 6ns.
According to our simulator, the are some non-monotonic on the address and
some of the control lines.
In your opinion, will the non-monotonic effects compromise the SI of the
board especially the control lines?
Thank you.
Regards,
SuMing TAI
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Su Ming, TAI ($B!F(JO ?v-3/4?j
ULTIMATE TECHNOLOGIES INC
Shindenchou 1462-6F, Nagano City,
Nagano Prefecture, JAPAN
380-0835
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E-mail [email protected]
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