RE: [SI-LIST] : PCI length calculations

About this list Date view Thread view Subject view Author view

From: Ingraham, Andrew ([email protected])
Date: Wed Feb 21 2001 - 07:49:18 PST

> In my case, I have 8 loads, with a trace impedance of 60 ohms. Using a
> daisy
> chain topology, with simulations,
> for both corners, to meet the setup and hold times will determine my
> maximum
> trace length. Am i correct?
Yes, that is a good approach.

> In a case where there are 10 loads, to meet the setup and hold times, the
> length will have to be lesser than with 8 loads.
> Am i correct
Generally, yes. But there can always be exceptions.

> Is there any other preferred topology for routing PCI bus signals? This is
> other than Daisy chain topology.
You would probably find that daisy chain works best.

> In what way is REQ# and GNT# different from AD signals in regard to the
> timing?
> Can you explain?
See the PCI timing specs. If you don't own the actual PCI specs, you can
find them in some of the books on PCI.

REQ# and GNT# have different timings. At 33 MHz, the outputs can have more
maximum delay (Tval). The input Setup times Tsu(ptp) are greater. Thus,
the amount left over for "wire" delay between ICs is reduced from 10 ns, to
4 ns and 6 ns respectively.

REQ# and GNT# are point-to-point signals so there is no waiting for
reflections to return from the ends of the bus; and their outputs are never
situated in the middle of the bus, having to drive both directions.

On the other hand, at 33 MHz, the PCI spec also allows REQ# and GNT# outputs
to be half-strength drivers, which can complicate things. I don't know if
many ICs do that, but it's possible.


**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected] In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at

About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:30:55 PDT