From: K.Orthner ([email protected])
Date: Mon Jan 29 2001 - 00:17:52 PST
Hi, folks.
I have what I expect is a rather easy question.
For a PCB we've designed, we have some signals that are 50ohm controlled
impedance traces. The circuit board stack-up is as follows:
1. signal
2. signal
3. 3.3v plane
4. signal
5. Gnd plane
6. signal
7. 1.8v / 2.5 v plane
8. signal
The signals in question are 3.3v TTL signals, running on layer 7. Can I
use the standard equations for impedance of a stripline in this case? I
have a feeling that since my 3.3v TTL signal isn't between GND & the 3.3v
plane, then this isn't exacly a stripline trace. Buried microstrip,
perhaps?
Note: The 1.8v/2.5v plane isn't well decoupled around the trace's driver
and receiver (since those complonents are 3.3v only.) There are even some
traces that go across the 1.8v/2.5v boundary.
My second question is: Is there a much better option for layer stacking? I
have a feeling that since most of my signals are 3.3v TTL, and the 1.8v and
2.5v is almost only for core voltages, that I'd really be better with the
following: (I don't think where the 1.8v/2.5v plane is really matters, does
it? )
1. signal
2. 3.3v plane
3. signal
4. signal
5. signal
6. Gnd plane
7. 1.8v / 2.5 v plane
8. signal
Thanks in advance,
-Kent.
-- Kent Orthner ?? ?? Furukawa Electric ?????? 5-1-9 Higashi-Yawata, Hiratsuka, 254-0016 Japan Tel: (0463) 24 8451 Fax:(0463)24-8490 [email protected]**** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
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