From: ªL´Â·× ([email protected])
Date: Mon Dec 25 2000 - 17:29:43 PST
After looking at your waveform, I think it is better than the waveforms I
usually have while simulating PCI bus. The PCI signal allows to have 10 ns
flight time. Within the during of 10ns, the excessive overshoot ringback ,
undershoot ringback, or non-monotonic
waveform won't effect the functionary of a circuit. For a synchronous bus,
PCI clock won't sample the bad area of waveform. Your waveform shall be OK
under this criterion.
Senior SI Engineer, Server Team, ARD4
Quanta Computer Inc.,Taiwan, R.O.C.
Email: [email protected]
Tel: 886+3+3979000 ext. 5183
From: Su Ming TAI [mailto:[email protected]]
Sent: Saturday, December 23, 2000 7:10 PM
To: [email protected]
Subject: [SI-LIST] : A PCI signal ringback question
Dear SI Gurus,
Hi! I'm doing some simulation on the PCI bus and there are some signals
(Data) having ringback low on the waveforms (see attachment). The ringback
low has almost reached the Vinl (0.8V) and what will happen if it does go
above the Vinh (assuming the worst case)?
Does it indicate a major SI problem here?
Any comments or explanations would be welcome.
Su Ming TAI
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