From: Zabinski, Patrick J. ([email protected])
Date: Fri Dec 01 2000 - 11:52:29 PST
Kenneth,
Assuming common full-swing CMOS buffers, overshoot and undershoot
are related the mismatch of the buffer's output impedance and the
transmission line's impedance. If the buffer's impedance is lower
than the line's, then you'll have overshoot. If the buffer's impedance
is higher, then you'll have undershoot.
By placing a series resistor at the output of the buffer (between
the buffer and the line), you will effectively raise the output
impedance of the buffer. So, if you initially have overshoot
on a buffer (without a resistor), your buffer has too low of an
output resistance. By placing an appropriately sized resistor
on its output, you'll be able to match the buffer's effective
resistance (internal plus external resistance) with that of the
line.
This is true if you are in a transmission line evironment. If you
happen to be driving a short line (Td < 0.5 * Trise), then you
will notice simple R-C time constants. By increasing R (again,
R = internal plus external resistance), you'll increase the
effective rise time (i.e., Trise ~= R * C). With the slower edge,
L * di/dt will be lower as well.
Pat
>
>
> Hi
>
> I wonder why if I added a resistor into the output buffer can reduce
> overshoot and undershoot
> significantly ?
>
> Kenneth
>
**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected]. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****
This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:30:20 PDT