From: John Fisher ([email protected])
Date: Thu Oct 12 2000 - 13:46:49 PDT
Be very careful of the placement of your probe cables, noise can couple onto the cable shields and that may be negatively impacting your jitter numbers. Try a different probe such as Doug Smith's passive differential coax probe.
At 02:37 PM 10/12/00 -0400, you wrote:
Sunil,**** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected] In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
I tend to agree with somebody here, who suggested your probe actually picks up noise. I don't see how EMI from fans can badly affect twinax cable, unless your Ground Connection is re-e-e-eally screwed up (and it takes some screw-up plus some ingenuity and luck....).
George Borkowicz wrote:
One more per cent. Try to replace the fans with a resistive load
of the same power (bulbs, power resistors, what have you) right
at the fan end of the fan wires.
-----Original Message----- From: Sunil Kumar [SMTP:[email protected]] Sent: Thursday, October 12, 2000 2:42 AM To: [email protected] Subject: [SI-LIST] : EMI due to fans (fwd)
I am measuring cycle-to-cycle jitter in clock in a system, where clock (PECL, 50MHz) is going from one PCB (card) to other through twinax cable. In the second card clock is converted into TTL and then distributed to various ICs. I am looking at the clock just before the PECL-to-TTL convertor. Both the cards are in the same backplane. The system is equiped with a set of fans for cooling, which are kept below the card frame. Now what I have observed is, when the fans are not on, jitter is much much less in comparision of the jitter when fans are on. I think, the fans are generating EMI, which is disturbing the planes in the backplane and the cards, and hence jitter is increased. Any explanations?
One more thing which I have observed is, the PECL-to-PECL clock fanout buffer (no PLL inside) is reducing jiiter (with fans off), i.e. jitter at input is more than that at output. Can anybody explain this?
Is there any PECL-to-TTL clock fanout buffer which adds very low jitter? The PECL-to-TTL buffer which I am using, is adding lot's of jitter.
Sunil Kumar Senior Research Engineer ATM Group C-DOT Bangalore-560052 INDIA
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