RE: [SI-LIST] : parasitic value for via

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From: JNH ([email protected])
Date: Tue Sep 19 2000 - 05:16:26 PDT

Dear Cantin,
It is very good of your explanation. However, I have one question. Look at
the profile of a via, we know that
a via is a cylinder physical structure. I cannot see the second cylinder
wrapped the first one, connected to ground.
The Capacitance of via seems to be formed by the first cylinder and the
cross section of plane of ground.
D2-D1 is the clearance hole between the cylinder and the plane.
Best Regards,

John Lin
SI Specialist, ARD4
Quanta Computer Inc.,Taiwan, R.O.C.
Email: [email protected]
Tel: 886+3+3979000 ext. 5183


-----Original Message-----
From: Pierre-Luc Cantin [mailto:[email protected]]
Sent: Sunday, September 17, 2000 7:43 AM
To: '[email protected]'; '[email protected]'
Subject: RE: [SI-LIST] : parasitic value for via

Dear Chunho,

With the help of Ozgur, thank you Ozgur for your contribution,
here the revised demonstration of Johnson via capacitance

- picture the via being a cylinder diameter=D1
- picture a second cylinder wrapped around the first one D2>D1
- this second one represents power/gnd planes
- both cylinders are iso-potential
- un-fold both cylinders and you end up with two parallel plates.
- the separation between the plates is the via clearance (D2-D1)/2
- the height of both cylinders is the board thickness (T)
- the width of the unfold-cylinder is equal to the via circumference which
is it's diameter times pi=3.1416... (pi*D1).

Now let do the math using Johnson example as a reference:
- er=4.7
- T=63mil ---> 1600um
- D1=28mil ---> 711um
- D2=50mil ---> 1270um
....Cvia = 1.41*4.7*0.063*0.028/(0.050-0.028) = 0.53pF
Now using two parallel plates capacitance formula:
Cvia= er*eo*A/d = er*eo*T*D1*pi/(D2-D1)/2, eo=8.85aF/um
= 8.85aF/um*4.7*1600um*711um*pi/(1270um-711um)2
= 531589aF = 0.531pF !!!

Pierre-Luc Cantin
Sr. ASIC Designer /
SI Team Leader

[email protected] <mailto:[email protected]> <>

phone (514) 931-5335 x217
fax. (514) 931-9923


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