From: Pat Sharkey ([email protected])
Date: Mon Aug 21 2000 - 06:46:24 PDT
Hello All.
I am new to the SI-list and have an immediate need to solve the following
problem.
The 10-layer board has the following stackup:
1 - Routing Horizontal
2 - Ground Plane
3 - Routing Vertical
4 - Routing Horizontal
5 - +5V, +3.3V, +/-10V Power Plane
6 - Ground Plane
7 - Vertical Routing
8 - Horizontal Routing
9 - Ground Plane
10 - Vertical Routing
There is a FPGA which also needs +2.5V for its internal core logic. What
layer provides the best location for a partial +2.5V plane (under the FPGA
only)? Does hatching the partial plane (at 45 deg.) have any benefit? The
FPGA uses the +3.3V for its I/O. The +3.3V plane already extends under the
device on the split power plane.
Please advise.
Regards,
Pat Sharkey
BVR Aero Precision Corp.
3360 Publishers Drive
Rockford, IL 61109
PH: 815.874.2471 ext. 101
FX: 815.874.4415
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