From: Aloke Bhattacharya ([email protected])
Date: Fri Aug 18 2000 - 21:26:14 PDT
Hello all,
I am a new user of the Cadence Specctraquest tool. I have a few
questions about the tool:
(i) For simulation, do I need the models for the passive components
also? I thought that the tool would automatically extract the parameters
and generate the .dml files for the passives(i.e. resistors and
capacitors), but I find that it's doing that for only a few of them. I
am working on a Allegro board file where the schematics was done in
Concept-HDL. I don't understand why the tool is able to extract the
models for only a few passive components, and not all of them. Is this
extraction dependent upon some
particular property(like CLASS, VALUE etc) associated with the part?
(ii) Suppose a net/xnet is connected between an IC and a connector in
the board. In this case, as the connector is a passive component, if the
IC pin is a driver, there will not be any receiver on the net and if the
IC pin is a receiver, there will not be any driver on the net. Hence, it
looks like this net cannot be simulated. Is there any way by which I can
simulate this net?
(iii) Continuing the above question: suppose the connector mentioned
above will be used to connect the current board to another board which
is not yet designed. Hence, I cannot use designlink to simulate the
connections between the boards. Is there any way to perform some
preliminary simulations on the section between IC's and the connector of
the current board so that we can do necessary layout changes in the
current board without waiting for the other board layout to be finished?
I have the schematics of the other board and the .dml models for the
ICs, but not the board file.
(iv)I find very difficult to get an IBIS model of a connector. In case
the connector is used to connect two boards, the model is definitely
required. How do you manage to get the IBIS model? Do you create the
IBIS model yourself? If yes, can you give an idea of what are the
parameters required and how to crate an IBIS/.dml model for a
connector?
Thanks in advance,
With regards,
Aloke
-- ********************************************************************** * Aloke Bhattacharya, * * Senior Engineer-VLSI/System Design, * * * Wipro Infotech, * * Global R&D, * * 88, M.G. Road, 5th Floor, * * S.B. Towers, * * Bangalore- 560 001 , * * INDIA * * Tel : 91-80-5588422(Ext. 520) * * email: [email protected] * * ************************************************************************** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
This archive was generated by hypermail 2b29 : Wed Nov 22 2000 - 10:51:06 PST