**From:** S. Weir (*[email protected]*)

**Date:** Fri Aug 11 2000 - 20:59:09 PDT

**Next message:**Peter Baxter: "[SI-LIST] : Interesting ESD devices"**Previous message:**linda walling: "RE: [SI-LIST] : Tools for high-speed interconnect design"**In reply to:**Greim, Michael: "RE: [SI-LIST] : LVDS Skew"**Next in thread:**Mike Jenkins: "Re: [SI-LIST] : LVDS Skew"**Reply:**Mike Jenkins: "Re: [SI-LIST] : LVDS Skew"

Michael,

It is easy to get fooled by this, but Vittorio is correct in his suspicion,

assuming equal rise and fall times, a crossing occurs so long as the skew

is less than the total rise time. If you offset by 50% of the rise time,

then the crossing occurs at 25% or 75% amplitude. This is easily shown by

solving for Tcross:

Given Tr = Tf, and a positive Tdelay for the rising waveform relative to

the falling waveform:

Tcross occurs when Vrising = Vfalling

Tcross cannot occur before 0, nor after the falling waveform reaches 0,

therefore Tcross is bound between 0 and Tr

Vr = Vlow + (( T - Tdelay )/Tr * ( Vhigh - Vlow ))

Vf = Vhigh - ( T/Tr * ( Vhigh - Vlow ) )

Solving for T where Vr = Vf:

Vlow + T/Tr * ( Vhigh - Vlow ) - Tdelay/Tr * ( Vhigh - Vlow ) = Vhigh -

T/Tr * ( Vhigh - Vlow )

Tdelay = 2T - Tr

Since T is bound between 0 and Tr, the maximum value of Tdelay is Tr.

If you use Scott's paper model, you can easily see this. The rising

waveform must be shifted to the left or the right of the falling waveform

by the whole Tr interval in order to prevent a crossing.

Regards,

Steve.

At 01:58 PM 8/11/00 -0400, you wrote:

*>With a rise time of 400 pS the differential switching
*

*>resembles an X. Move either waveform by 200 pS and
*

*>your differential switch point resembles /\ or \/.
*

*>I hope this helps your visualization.
*

*>
*

*>MG
*

*>
*

*>-----Original Message-----
*

*>From: Ricchiuti Vittorio [mailto:[email protected]]
*

*>Sent: Friday, August 11, 2000 3:56 AM
*

*>To: Scott McMorrow; [email protected]
*

*>Subject: RE: [SI-LIST] : LVDS Skew
*

*>
*

*>
*

*>Scott,
*

*>I don't understand why the differential crossing ceases to exist when the
*

*>skew between signals is 200ps. Why not 400ps?
*

*>
*

*>Regards
*

*>Vittorio
*

*>
*

*>
*

*>ing. Vittorio Ricchiuti
*

*>CAD support and SI engineer
*

*>Siemens ICN
*

*>Loc. Boschetto
*

*>67100-L'Aquila
*

*>ITALY
*

*>
*

*>
*

*>-----Original Message-----
*

*>From: Scott McMorrow [mailto:[email protected]]
*

*>Sent: Thursday, August 10, 2000 1:50 AM
*

*>To: Vinu Arumugham; [email protected]
*

*>Subject: Re: [SI-LIST] : LVDS Skew
*

*>
*

*>
*

*>Vinu,
*

*>
*

*>Take two sides of a differential transition that goes from
*

*>low to high in 400ps with a perfectly balanced transition.
*

*>
*

*>Call the differential crossing point 0ns. Thus the complete
*

*>differential transition (irrespective of the bit rate) occurs
*

*>in +/-200 ps.
*

*>
*

*>Now skew one side of the pair thus translating one of the
*

*>waveforms. As the skew increases, the differential crossing
*

*>point slides up (or down, depending on the edge) in voltage.
*

*>Eventually, in this case at 200 ps of skew, in a noiseless
*

*>perfect system the differential crossing ceases to exist.
*

*>
*

*>This is true no matter what the bit period is and is dependent
*

*>only on the edge transition time of the differential signals. You
*

*>can prove this to yourself by taking two pieces of paper.
*

*>On one draw a rising edge. On the other draw a falling edge.
*

*>both should have the same edge transition time and same
*

*>low to high signaling level.
*

*>
*

*>Now, assuming you can see through the paper, align the
*

*>edges so that they cross exactly in the center. Then, slide
*

*>the falling edge to the right. The crossing point moves up
*

*>in voltage and out in time across the rising edge. This is
*

*>what differential skew does to the signal seen at the
*

*>receiver.
*

*>
*

*>After 1/2 the edge transition time the crossing point is at
*

*>the high signaling level, where a differential crossing no
*

*>longer exists.
*

*>
*

*>Now increase the edge transition times by a factor
*

*>of 2:1. There is now twice as much latitude for differential
*

*>skew.
*

*>
*

*>The moral of this story is to use the slowest edge rate necessary
*

*>to sustain a particular operating bit period. It is more tolerant of
*

*>differential skew.
*

*>
*

*>
*

*>regards,
*

*>
*

*>scott
*

*>
*

*>
*

*>--
*

*>Scott McMorrow
*

*>Principal Engineer
*

*>SiQual, Signal Quality Engineering
*

*>18735 SW Boones Ferry Road
*

*>Tualatin, OR 97062-3090
*

*>(503) 885-1231
*

*>http://www.siqual.com
*

*>
*

*>
*

*>Vinu Arumugham wrote:
*

*>
*

*> > Scott McMorrow wrote:
*

*> >
*

*> > > David,
*

*> > >
*

*> > > It depends on the edge rate of LVDS signal. Differential skew, besides
*

*> > > causing common mode currents, will cause a translation in time and
*

*>voltage
*

*> > > of the differential crossing point. This causes the received Eye to
*

*>close
*

*> > > down and may be perceived as timing jitter. If the skew is greater than
*

*> > > 50% of the edge transition time, then the eye becomes totally closed.
*

*> > > (i.e. A 50% edge transition time skew causes the differential crossing
*

*>to
*

*> > > never be seen at the receiver.)
*

*> > >
*

*> >
*

*> > This may be true if the period = 2 x transition time. But at 200MHz, this
*

*> > does not look like a possibility.
*

*> >
*

*> > >
*

*> > > Some LVDS drivers have edge rates in the 400ps range. 200ps of skew
*

*> > > would totally close the eye. 50ps of skew would reduce the eye opening
*

*> > > by 25%, a significant reduction in noise margin.
*

*> > >
*

*> > > With 1ns edge rate drivers, like some of the "nice" LVDS devices, 50ps
*

*> > > of skew is not a big deal. This translates to only a 10% noise margin
*

*> > > reduction.
*

*> > >
*

*> > > regards,
*

*> > >
*

*> > > scott
*

*> > >
*

*> > > --
*

*> > > Scott McMorrow
*

*> > > Principal Engineer
*

*> > > SiQual, Signal Quality Engineering
*

*> > > 18735 SW Boones Ferry Road
*

*> > > Tualatin, OR 97062-3090
*

*> > > (503) 885-1231
*

*> > > http://www.siqual.com
*

*> > >
*

*> > > David Haedge wrote:
*

*> > >
*

*> > > > Dear SIer's:
*

*> > > >
*

*> > > > I have a person concerned about 55ps of skew between the two traces
*

*> > > > on an LVDS differential pair. The LVDS bus is running at 200MHz, a
*

*> > > > 5ns period. What negative effect on the system would occur if say,
*

*> > > > there was a 100ps or even 200ps mismatch? Timing margins are
*

*> > > > still within spec with even a 1ns mismatch. Some common mode
*

*> > > > currents may be launched, but I think they would cause minimal
*

*> > > > noise and not cause any circuit upsets. Has anybody seen problems
*

*> > > > with LVDS signaling with >55ps diff pair line skew?
*

*> > > >
*

*> > > > David Haedge
*

*> > > > Raytheon
*

*> > > >
*

*> > > > **** To unsubscribe from si-list or si-list-digest: send e-mail to
*

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*

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*>
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*>
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*>
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*>
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**Next message:**Peter Baxter: "[SI-LIST] : Interesting ESD devices"**Previous message:**linda walling: "RE: [SI-LIST] : Tools for high-speed interconnect design"**In reply to:**Greim, Michael: "RE: [SI-LIST] : LVDS Skew"**Next in thread:**Mike Jenkins: "Re: [SI-LIST] : LVDS Skew"**Reply:**Mike Jenkins: "Re: [SI-LIST] : LVDS Skew"

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