Re: [SI-LIST] : Adding inductors to ground?

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From: D. C. Sessions ([email protected])
Date: Wed Mar 01 2000 - 17:48:08 PST

Chris Bobek wrote:
> Hi,
> I came across a schematic that shows the PLL ground of an IC connected
> to ground through an inductor. The Vcc pin of the device is connected
> to a bunch of caps and an inductor to Vcc.
> I understand and have used an inductor (or a resistor) with a bunch of
> decoupling caps on Vcc for applications like this. But, I've always
> tied the Gnd pin(s) directly to ground. It doesn't make any sense to me
> why you would want to add inductance in the path of any ground. It
> seems you would just add switching noise to your device.
> Can somebody explain whether this is common practice, or whether it was
> a poor design (sorry I don't have more information on the particular
> device).

Thanks to all of the digital garbage going on, the substrate of an
IC is quite noisy. We try to keep as much of that noise out of the
PLL section as possible by using N-well moats and P+/metal rings
(one blocks surface currents and the other drains them off harmlessly.)
The point of all this isn't to create some cosmically quiet ground area
but to keep circulating currents from creating local potential differences.

The trouble is, that stupid substrate is still there. The bult ties in
the PLL area still offer a path out of the package through the PLL
ground connection, which in turn can modulate the PLL frequency. So,
according to one theory, you need to put an inductor on the PLL ground
path so that the high-frequency stuff has no outlet (obviously you have
to do the same with PLL power and bypass them together very thoroughly.)

This is by no means a universally-accepted method. Some report good
results, some report better luck with a low impedance ground path.
Your milage may vary. Hope this helps. Have a nice day.

D. C. Sessions
[email protected]

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