Re: [SI-LIST] : ESR and bypass caps

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From: Ron Miller ([email protected])
Date: Fri Feb 04 2000 - 11:43:31 PST

Hi Larry

I agree with you totally but would like to add that there is a parallel resonance near the series resonance for most chip capacitors not unlike a crystals
impedance. The lossiness of he PCB may smooth this out. ATC impedance curves bear this out.

Ron Miller

Larry Smith wrote:

> Doug - Please allow me to address your comments below.
> > X-Sender: [email protected]
> > Date: Thu, 03 Feb 2000 15:38:06 -0800
> >
> > 1. As ESR goes down, the troughs get deeper and the peaks get higher!
> Very true!
> > 2. The minimum impedance value is NOT NECESSARILY ESR (or ESR/n); it can
> > and is lower than that!
> I am not sure I understand this one. If we have a series RLC circuit,
> the minimum impedance will be when the positive and negative reactance
> (jwL and -1/jwC) cancel each other and you are left with R. I don't
> see how the minimum impedance can be any less than that. Are you
> considering a more complex circuit?
> > 3. The minimum impedance points are not necessarily at the capacitor
> > self-resonant points.
> With typical RLC values found in the industry today, we have always
> found the minimums to be at frequency 1/(2pi*sqrt(LC)), both in the
> lab and in simulation. Again, we have assumed a simple series RLC
> model for the capacitor. This model checks out very well with all of our
> lab measurements.
> > 4. For a given number of capacitors, better results can be obtained from
> > more capacitor values, with moderate ESRs, spread over a range than with a
> > smaller set of capacitor VALUES, with very low ESRs, even at well chosen
> > specific self resonant frequencies.
> I mostly agree with this. We (Ray and I) took a quick look at your
> article. We would like to see you narrow in on inductance and ESR
> values that are typical in the industry today for surface mount
> chip size capacitors mounted on pcb's with vias down to power planes.
> A few years ago, it was common to find capacitor mounting pads that had
> 5 nH of inductance. With careful design and manufacturing techniques,
> it is possible (and easy) to make mounting pads below 1 nH. Just this
> week in the lab, we measured the inductance of 0603 size capacitors
> mounted on pads appropriate for IR reflow soldering and connected to
> power planes that were on layers 2 and 3 below the surface. The total
> inductance for the capacitor, pads and power plane spreading inductance
> is between 0.8 and 0.9 nH. If the capacitor is mounted on the other
> side of the pcb so that the via current loop is larger, the inductance
> is 1.4 nH. This information is crucial if you want to target a
> particular frequency for a low ESR capacitor. One nH of inductance
> should be the industry bench mark for mounted decoupling capacitors.
> Let me make this statement in bold letters: YOU MUST HAVE LOW INDUCTANCE
> Low ESR capacitors with high inductance pads are dangerous. They
> produce the strong anti-resonances (high impedance peaks) that you have
> shown in your article. Products will experience SI and/or EMI
> problems if you use low ESR capacitors on highly inductive pads.
> We have spent a great deal of time characterizing the ESR of Y5V, X7R,
> and NPO dielectric capacitors, please see Tanmoy's work published at:
> Capacitors that resonate (low impedance) above 100 MHz on 1 nH pads
> typically have ESR between 100 and 500 mOhms. Some vendors are
> definitely lower than others. ESR is a very important specification
> for ceramic capacitors that is basically uncontrolled by our industry.
> You can obtain low ESR capacitors but you pay big bucks for them. When
> the price of Palladium goes up, so does the ESR. We are typically
> trying to hit target impedances near 10mOhms, so it takes 10 good
> capacitors in parallel to achieve the desired impedance at the desired
> frequency. It takes 50 of the bad ones!
> > In order to verify the theory, we had to write a program that could, for
> > any arbitrary set of capacitor (and inductance and ESR) values, find the
> > minimum and maximum frequencies and impedance values. We have done that.
> > The calculator is available for license.
> >
> > The article can be obtained from our web site:
> >
> >
> We completely agree that you need software tools to help you choose the
> menu of capacitors to use on products that require low impedance power
> distribution. The 'shotgun approach' and sprinkling in of typical
> decoupling capacitor values does not cut it when you have dangerous
> high impedance resonances running around from low ESR capacitors mounted
> on inductive pads. Careful selection of capacitor values is required.
> For capacitors that resonate at frequencies near the pcb resonances
> (100MHz to 1GHz), position on the pcb is critical. Software tools
> involving distributed power plane analysis are required to optimize
> placement.
> Here at Sun we have been using homegrown software tools to do just
> this for several years. We have good model to hardware correlation at
> the system level. We have produced many successful products using
> these techniques and have diagnosed and corrected problems in current
> products (this week's fire drill...).
> We feel very strongly that low ESR capacitors (100mOhms or less) are
> required in our industry at reasonable prices. This is one of our
> motivations for publishing our results and methodology. This week at
> Design Con, Sun Microsystems and Cadence Design systems announced a
> joint development relationship to provide for analysis of power
> delivery issues. See announcement at:
> You can read all the high level language but in plain engineering
> speak, the Sun homegrown tools are becoming available to the
> industry under the Cadence SpecctraQuest environment. (Yes, this
> is an unabashed product endorsement.) Our capacitor ESR data
> base is included. We hope that this will develop a market for controlled
> ESR capacitors and initiate competition among the capacitor vendors
> for providing the best ESR capacitors for decoupling purposes.
> regards,
> Larry Smith
> Sun Microsystems
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Ronald B. Miller  _\\|//_  Signal Integrity Engineer
(408)487-8017    (' 0-0 ') fax(408)487-8017
Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA  95131
[email protected],  [email protected]

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