From: Brent DeWitt ([email protected])
Date: Wed Jan 26 2000 - 13:03:42 PST
I read a short article by Howard Johnson not too long ago that got me
thinking about the current density cross section in surface mount
capacitors. As we shrink the pc board layer thickness from component layer
to reference layer, the height dimension of the capacitor starts to look
very significant. I would expect that a .020" to .040" thick cap over a
0.005 epoxy glass layer would show significant variation over it's vertical
profile, but I have no tools for modeling this.
So I have questions for this group:
- Has anyone ever tried to model this and am I totally out of my mind?
- Is the effect significant enough to warrant finding a shorter but wider
capacitor for a given value?
- Does the mutual inductance of the metalization layers in the capacitor
come into play, or can it be treated as a uniform dielectric block for
This is probably all very silly and trivial, but I'm really interested in
the answer. Thanks!
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