RE: [SI-LIST] : receiver jitter

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From: Tom Dagostino ([email protected])
Date: Wed Jan 19 2000 - 11:43:05 PST

Both IBIS and SPICE have their place and I believe neither will displace the
other. But don't blindly assume either is always correct.

I've compared IBIS models derived from SPICE to measurements of the same
device and found significant discrepancies (for example, the MAX model from
SPICE, low temp, high voltage and process extreme, was weaker than the
nominal voltage, room temperature, who knows from where in the process
measurement part I measured).

I don't know why people assume SPICE characterizes all the pertinent aspects
of an IC and is thus better. Another example I have seen was in a 486DX4.
As an exercise we measured every I/O pin on this part. One of the things we
noticed was and increase in the DC resistance in the supply clamp device as
the distance from its Vdd5(?) pin increased (for those who don't know, this
part had a separate supply voltage that allowed the supply clamp to be at
3.3 or 5 Volts). Neither IBIS or SPICE model for this part likely does not
include a model for each and every buffer on the chip and its associated
wiring R and L.

We make IBIS models from SPICE for several IC manufacturers. One of the
things we have noticed is that not all IC vendors use the same SPICE. Not
all SPICE decks will run on your local favorite version. There are great
advantages to having a common language.

One added comment: When doing a simulation, do you have models for every
part from every source your purchasing department will buy from? Never
assume that the second sources are equivalent. You would be amazed at how
different "second sources" can be.

Carpenters need many tools to do their jobs, a hammer has its limitations.

Tom Dagostino
ICX Modeling Group
[email protected]

-----Original Message-----
From: [email protected]
[mailto:[email protected]]On Behalf Of Muranyi, Arpad
Sent: Tuesday, January 18, 2000 12:14 PM
To: '[email protected]'
Subject: RE: [SI-LIST] : receiver jitter


Let's not start this IBIS vs. HSPICE discussion (argument)
again!!! We already had enough of it not too long ago
on this email reflector.

If the information wasn't proprietary, I could give you
an example where my IBIS(!) model's simulated waveforms
were matching right on with our internal SPICE tool's
waveforms, while the HSPICE translation of the same internal
SPICE tool's model (which BTW ran 200 times longer than the
IBIS equivalent) was way off, giving me about twice the
skews for the source synchronous simulations I ran with the
aforementioned IBIS models. The reason I know which one
was off is because I correlated both the HSPICE and IBIS
models against the original source, the Intel-SPICE model.
I had to have my design engineers tweak the HSPICE model
on several parameters before it agreed finally.

It all depends on what you put into the model, not what
the modeling technique is.

However, regarding the original email and my previous
response to it, Chris was talking about behavioral modeling
in general "like IBIS" and not IBIS itself. The way I
understand it, Chris is against any behavioral modeling
and in favor of any(?) SPICE, especially when it comes to
high-tek stuff like source synchronous buses.

This is where he is wrong in my opinion. It may be true
that IBIS has limitations in certain circumstances as it
stands today, but we are working on that. However, it is
definitely not true that if you have a clean sheet of paper
and enough brains that you cannot write a model behaviorally
to any level of accuracy which rivals or supersedes the
accuracy of SPICE models. It all depends on how many effects
you take into consideration.

However, it is not necessary to go to low level geometric and
material science details (like the SPICE process files do it)
to achieve a certain level of accuracy. If that was true, you
would be better off discarding the current SPICE device
equations and start modeling things on the electron and
crystal structure level. You may get more accurate models
that way, but I am not even sure about that. Also, was it
worth it? (You may need it to describe quantum effects, but
I am pretty sure you could find "behavioral" methods to do
even those).

Just as transistor level models in SPICE don't go into the
atomic level of detail and describe the BEHAVIOR of the
transistor on a higher level, "behavioral models" can do the
same thing on an even higher level. You just have to know
how to describe a certain element's or building block's or
full buffer's voltage, current, frequency, etc. response in
terms of higher level parameters.

In that light it is just the matter of the level of abstraction
what a model is, and all of the sudden all models will look like
like "behavioral" models.

I would like to make an analogy: Think of the difference between
continuous vs. discrete (sampled) sound signals. Which one is more
true to real life? (Forget about most everything being quantized in
real life). Does your sound system sound better with an analog signal
or with a digitally recorded CD? The answer from an audiophile would
be analog! That may be true if you own studio quality equipment.
You may even want to go with vacuum tube amplifiers, and pay extra
for heating them and air conditioning your room at the same time.
However, if you think of your 20-year old cassette tape recorder
or a boom box, you will most likely answer that a digital CD sounds
much better! So the real answer is "depends"... just like with

So let's spell acronyms and first letters of sentences according
to properness and not emotions!

Arpad Muranyi
Intel Corporation
-----Original Message-----
From: Ronald E. Nikel [mailto:[email protected]]
Sent: Tuesday, January 18, 2000 10:28 AM
To: [email protected]
Subject: RE: [SI-LIST] : receiver jitter


Rant on -

I concur completely. Anyone who thinks they can design a source
bus running above 200Mb/s per IO using IBIS might as well cover their
and throw a dart. IBIS by definition is the fastest way to the wrong
I have been able to prove this over and over again using IBIS models for
4X which only runs at 266Mb/s per IO, which by the way exibited up to
signal quality and timing variation from HSPICE of the same circuit
HSPICE was within 5% tolerance of actual hardware measurements). The
of art in the signal integrity area's that are emerging are at 500Mb/s
IO up to 3Gb/s per IO. In this area of operation 10mV and 1-ps
resolution is
going to be required, with lots of model to hardware correlation. IBIS
never reach that accuracy so Spell SPICE in all capitols - that is the
way you will get first pass success on your hardware.

Rant off -

Ronald E. Nikel
TriCN Associates LLC

-----Original Message-----
From: [email protected]
[mailto:[email protected]]On Behalf Of Chris Cheng
Sent: Monday, January 17, 2000 4:51 PM
To: [email protected]
Subject: [SI-LIST] : receiver jitter
Importance: High

as core and signal swing getting smaller and smaller, this
problem is getting worst. compound this with source sync
buses where the strobes and data can behave differently
(true differential vs. pseudo differential), i believe
predicting the response of the receiver under different
waveforms input will be as important as simulating
the propagation of signal in the interconnect
environment. this will be the final nail in the coffin for
behavioral models like ibis which is totally incapable of
handling such analysis. i have seen pitiful attempts to
qualitatively describe it in ring back or edge rate
extrapolation but without the ability to simulate the
receiver behavior, those specs are just fancy words with
no meaningful insight into the response of the true
can i spell SPICE again.

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