Re: [SI-LIST] : Micro Noise Part 2

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From: Jeff Seeger ([email protected])
Date: Fri Nov 05 1999 - 10:30:41 PST

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[email protected] wrote:
>
> snip <
>
> So, what if I do this?:
>
> Layer 1 Component, Pads, some routing.
> Layer 2 Routing
> Layer 3 Ground
> Layer 4 Power
>
> snip <
>
> I've not seen this lay-up suggested much, but it looks like it could work. So
> before I go ahead and try it I thought I'd bounce the idea.....
>
> Opinions?
>

        This presents a manufacturing problem; it is likely to
        warp. In order to avoid that circumstance, you should
        arrange your layers with similar copper images (positive
        versus negative) and dielectric thicknesses in symmetry
        through the Z-axis.

Not sure how to help you with your 4kV noise without the
addition of a shield of some sort.

Regards,

-- Jeff Seeger Applied CAD Knowledge Inc Chief Technical Officer Tyngsboro, MA 01879 jseeger "at" appliedcad "dot" com 978 649 9800

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In reply to: [email protected]: "[SI-LIST] : Micro Noise Part 2"
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