Re: [SI-LIST] : Micro Noise

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From: sweir ([email protected])
Date: Wed Nov 03 1999 - 12:25:25 PST

Ron,

Normally, I would not consider intentionally inserting inductance in either
the power or ground leads. I am concerned that a high di/dt will collapse
Vcc on the chip and lead to all manner of problems. It seems just as
likely to me that the problem is too much inductance in the existing power
distribution which is causing the problem.

Regards,

Steve.

At 10:02 AM 11/3/99 -0800, you wrote:
>Derek
>
>If you have the option to add inductance in the power and ground
>connections to the chip
>this will slow up the edges and reduce emi. With a 50 Mhz signal it
>looks like the
>edges could be slowed quite a bit without effecting performance. Good luck.
>
>Ron Miller
>
>[email protected] wrote:
>>Hi all,
>>
>>I have a problem with a microprocessor which appears to be radiating very
>>strongly from the package. I've deactivated all other circuits ( pulled
>>crystals, pins etc ) on the board. Additionally, the micro is held in reset,
>>PROM's are pulled, but it's a noisy as heck. Close field probes ( both E and
>>H field ) show the package to be the dominent source of radiation.
>>
>>The device has a maximum clock rate of 50 MHz, this is where we're using it.
>>Clock it at 32 MHz and the emissions fall about 10 dB up to about 300 MHz,
>>more above 300 MHz. Yes it's a CMOS device.......
>>
>>Am I stuck with putting a can over the chip? The product has a plastic
>>package, so there is no shielding available at all.....
>>
>>Thanks,
>>
>>Derek
>>
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>--
>Ronald B. Miller _\\|//_ Signal Integrity Engineer
>(408)487-8017 (' 0-0 ') fax(408)487-8017
> ==========0000-(_)0000===========
>Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA 95131
>[email protected], [email protected]

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