Re: [SI-LIST] : Interesting theoretical questions

From: [email protected]
Date: Tue Nov 02 1999 - 10:23:12 PST

• Next message: Jian Zheng: "RE: [SI-LIST] : Interesting theoretical questions"
• Previous message: D. C. Sessions: "Re: [SI-LIST] : PECL output buffer implementation in CMOS"
• In reply to: Mike Hughes: "Re: [SI-LIST] : Interesting theoretical questions"
• Next in thread: Balaji Lakshminarayanan: "RE: [SI-LIST] : Interesting theoretical questions"

On Computer's without Clocks.

Asynchronous computers have had a whole lot of study and implementation.
In fact, In a sense the old DRAM chips were examples of asynchronous
behavior. The CPU sends out data and a DATA_READY and then waits for an
ACKNOWLEDGE. The two chips don't share clocks.

jon powell
Viewlogic Consulting Services

**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****

• Next message: Jian Zheng: "RE: [SI-LIST] : Interesting theoretical questions"
• Previous message: D. C. Sessions: "Re: [SI-LIST] : PECL output buffer implementation in CMOS"
• In reply to: Mike Hughes: "Re: [SI-LIST] : Interesting theoretical questions"
• Next in thread: Balaji Lakshminarayanan: "RE: [SI-LIST] : Interesting theoretical questions"

This archive was generated by hypermail 2b29 : Tue Feb 29 2000 - 11:39:31 PST