From: Larry Miller ([email protected])
Date: Fri Oct 29 1999 - 13:21:56 PDT
Follow the UltraCad URL below and have a look at Doug Brooks' papers
diff_z.pdf and terminations.pdf.
These papers are
1) Clear
2) Mathematically rigorous
3) Correct.
>">By the way, has anyone who advocates differential impedance shown why it is
>necessary and what happens if isn't maintained? I've never seen anyone
>demonstrate this. I'd welcome some analysis that supports this point of
>view, if it exists."
What happens is that you get impedance mismatches. This causes ringing and
EMI. The analysis is presented in Dr Johnson's book and may be easily
demonstrated on a PCB by doing it wrong, especially at frequencies above
200 MHz. We had to tweak all of our Gigabit Ethernet designs to get the
impedance trimmed sufficiently that we could pass EMI (the symptom being a
big 2500 MHz component).
What you have below is just poop.
Is there some specific reason you continue to bring these things up? We are
talking physics here, not opinion.
The fact that something is published does not necessarily make it correct.
There are whole journals devoted to the veriest nonsense.
Larry Miller
At 12:26 PM 10/29/99 -0400, you wrote:
>Hi Steve I just got an e-mail back from Lee about his article: (Doesn't
>touch the length difference though)
>Let me know what you think.
>
>Lee worte:
>"The intention of my article is to show that proper operation of a digital
>differential signalling circuit does not depend on a particular differential
>impedance existing between the two lines. If you look at the termination
>specifications for LVDS you will see that this is true. The termination
>value is
>2X the impedance of either line and the termination is placed across the
>ends of
>the two lines. What matters is that each of the two signal paths is
>properly
>terminated with enough accuracy that the erosion of each signal from
>reflections
>is within system noie margin limits. (By the way, both LVDS and ECL
>differential signalling can tolerate surprisingly large amounts of
>reflections
>and work properly.)
>
>. Often, by the geometry we pick when routing, there will exist a
>differential
>impedance between the two lines. In this case, we might need to allow for
>the
>differential impedance as well as the "common mode" impedance between each
>line
>and system ground. Whether this is necessary depends on the tolerance the
>signalling protocol has for impedance mismatches. In LVDS and ECL, there is
>enough tolerance that this can be ignored. In level sensitive analog like
>video, this may not be true. But, remember the article covers logic
>signalling
>only.
>
>By the way, has anyone who advocates differential impedance shown why it is
>necessary and what happens if isn't maintained? I've never seen anyone
>demonstrate this. I'd welcome some analysis that supports this point of
>view, if
>it exists."
>
>Regards,
>
>Paul Denomme
>
>> -----Original Message-----
>> From: sweir [SMTP:[email protected]]
>> Sent: Friday, October 29, 1999 8:28 AM
>> To: [email protected]
>> Subject: RE: [SI-LIST] : Comments from your SI seminar (SendII)`
>>
>> Paul,
>>
>> Where is this article? I think the claim on matched lengths is going to
>> cause quite a bit of controversy.
>>
>> For just the signal integrity, never mind the EMI:
>>
>> If the risetime is known, then any mismatch in length can be equated to a
>> differential voltage offset during transitions. The offset appears in
>> opposite polarity for opposite edges, so a duty-cycle distortion results.
>> This shows up in both simulation and real lab measurements. If the
>> risetime is slow compared to the mismatch, then the effects will be
>> minimal. For the examples given this is definitely not the case.
>>
>> 180pS/inch @ 1.6 in = 298pS, none of the signal transition is
>> differential. The receiver will switch when the voltage on the shorter
>> trace satisfies the receiver hysteresis. This is hardly a good situation
>> for skew and jitter control.
>>
>> 180pS/inch @ 0.5in = 90pS for LVDS @ 350mV/300pS per lead, introduces an
>> effective offset of about -95mV in the longer lead for - to + transitions,
>> and +95mV in the longer lead for + to - transitions. This approximates
>> the maximum voltage required at the receiver to switch, 100mV. So, again,
>> the switching suffers skew and jitter because we have lost the benefits of
>> differential signaling for switching. Not a problem if a 200pS out of the
>> timing budget doesn't matter. If we look at eye patterns at 50MHz no one
>> will notice. However, at common transmission rates of 1-2.5Gbps, 200pS is
>> a lot to give up.
>>
>> These are just the static effects. If we then look at the impairment
>> caused by the physical antenna paths such differences cause relative to
>> aggressors, this situation may deteriorate quite a bit more.
>>
>> If you would like a more intuitive approach, consider that the advice(
>> routing around holes, etc ) is tantamount to claiming that you can make
>> equally accurate high-speed oscilloscope measurements with an extra 0.5
>> inches in the ground lead rather than maintaining coax all the way to the
>> signal source. Most of us know all too well such a notion is hogwash.
>> Why does the author claim our digital circuits are different?
>>
>> Regards,
>>
>>
>> Steve.
>>
>> At 08:04 AM 10/29/99 -0400, you wrote:
>>
>>
>> It is also stated in this article that critically matched
>> lengths is
>> unnecessary, however you MUSt take into account your noise
>> margins(parallel
>> aggressors). It states that differential transmissions only need
>> about 15mV
>> difference to switch.
>> Assuming no noise/ crosstalk and a 300pSec rise time in
>> FR-4(180
>> pSec/In), the pairs length could be mismatched by as much as 1.6
>> inches(Tr/Td) and still function. So a 500 mil difference in line
>> length
>> would be acceptable. What he is really stating is that if you need
>> to route
>> one of the traces around a through hole, just do it.
>>
>> It only shows an example for ECL and LVDS Logic in the
>> acrticle.
>>
>> Regards,
>>
>> Paul Denomme
>>
>>
>> > -----Original Message-----
>> > From: S. Weir [SMTP:[email protected]]
>> > Sent: Thursday, October 28, 1999 6:04 PM
>> > To: [email protected]
>> > Subject: RE: [SI-LIST] : Comments from your SI seminar
>> (SendII)`
>> >
>> > Paul,
>> >
>> > Are you assuming:
>> >
>> > 1. The traces have been specified to remain at a constant
>> separation?
>> > 2. The trace pair will have a minimum separation from parallel
>> aggressors?
>> > 3. The traces will have matched lengths?
>> >
>> > I am not sure how such things can be assumed and make it to the
>> physical
>> > design. If the trace lengths don't match, the signal will have
>> lots of
>> > common mode for fast enough edges. If there is not enough
>> separation from
>> >
>> > parallel aggressors, then aggressors can inject differential mode
>> > noise. If the traces do not maintain a constant separation, the
>> impedance
>> >
>> > will vary by about half the variation in the coupling coefficient.
>> >
>> > Regards,
>> >
>> >
>> > Steve.
>> >
>> > At 03:30 PM 10/28/1999 -0400, you wrote:
>> > > I have read an article recently that states that the use
>> of
>> > >specifying the differential impedance of two traces on a circuit
>> board is
>> > >unnecessary. The only thing you need to worry about is the
>> individual
>> > trace
>> > >impedance. If you need a differential impedance for two lines to
>> be 100
>> > >ohms, just use two 50 ohm lines rather than using two signals
>> whose
>> > >differential impedance is 100 ohms. Also when connecting a 110
>> ohm
>> > twisted
>> > >pair to PCB you should just connect it to two 55 ohm traces to
>> achieve
>> > the
>> > >110 ohm differential impedance. I have done enough research to
>> draw my
>> > own
>> > >conclusions, but I would like to get the reaction from people in
>> this
>> > forum
>> > >regarding this issue.
>> > >
>> > >Thank you,
>> > >
>> > >Paul Denomme
>> > >Viasystems Inc.
>> > >
>> > >
>> > >
>> > > > -----Original Message-----
>> > > > From: Doug Brooks [SMTP:[email protected]]
>> > > > Sent: Thursday, October 28, 1999 12:59 PM
>> > > > To: [email protected]
>> > > > Subject: RE: [SI-LIST] : Comments from your SI seminar
>> (SendII)`
>> > > >
>> > > > >But a comment on our industry in general,
>> > > > >
>> > > > > I went to several courses at the PCB Design East, and
>> each
>> > course
>> > > > >instructor had their own opinion on what they believe is the
>> correct
>> > way
>> > > > of
>> > > > >doing things.
>> > > > >It is sad that our industry cannot take a concensus and come
>> up with
>> > the
>> > > > >CORRECT way of doing things. Instead of using testing and
>> empirical
>> > data
>> > > > to
>> > > > >determine what is accurate, they bicker about why ones
>> methods will
>> > or
>> > > > won't
>> > > > >work.
>> > > > >
>> > > >
>> > > >
>> > > > As a seminar presenter at PCB East, and one who is also
>> concerned
>> > about
>> > > > the
>> > > > fact that students hear different things in different courses,
>> I'd
>> > like to
>> > > > offer a few random comments here.
>> > > >
>> > > > First, people in our industry need a better understanding
>> about
>> > > > fundamental
>> > > > electrical engineering!! And I am not just talking about those
>> without
>> > an
>> > > > engineering degree, but also those with an engineering degree
>> who (1)
>> > > > didn't take certain kinds of classes related to such high
>> speed issues
>> > as
>> > > > crosstalk, transmission lines, and stray trace/lead
>> inductance, etc.
>> > (2)
>> > > > took them and didn't understand them, or (3) took them and
>> forgot
>> > them!!
>> > > > And I am not criticizing them --- in my second job out of
>> college my
>> > > > company was designing state-of-the-art components for the
>> > state-of-the-art
>> > > > Illiac IV computer that were water cooled ECL devices running
>> at the
>> > > > remarkable speed of 3 MHZ! Things DO change.
>> > > >
>> > > > Second, it's nice to have rules of thumb, but it is better to
>> > understand
>> > > > where those rules of thumb came from and when they might (and
>> might
>> > not)
>> > > > apply. I often get comments like "In so-and-so's class HE said
>> ...".
>> > My
>> > > > response is to try to make the issue UNDERSTANDABLE for the
>> student so
>> > > > he/she can make up his/her OWN mind about what position seems
>> more
>> > > > reasonable. But that can be a challenge when the student has
>> very
>> > little
>> > > > technical understanding.
>> > > >
>> > > > Thirdly, as has been pointed out, there aren't a lot of
>> absolutes in
>> > our
>> > > > industry. If there were, we'd all understand and be teaching
>> the same
>> > > > (absolute) rules of thumb. While I am a strong supporter of
>> studies
>> > (and
>> > > > have contributed to two of them --- the effects of vias on
>> traces and
>> > the
>> > > > effects of 90 degree corners) this is not always the answer.
>> Because
>> > ...
>> > > > each design has a unique environment. So, what works in one
>> > environment
>> > > > might not apply to another. Once again, my approach is usually
>> to try
>> > to
>> > > > present to the student the ISSUES and the alternative
>> opinions, so
>> > they
>> > > > can
>> > > > recognize problems and (hopefully) potential solutions when
>> they
>> > arise. As
>> > > > before, it is improved understanding that helps the designer
>> (and the
>> > > > engineer) solve problems, not rules of thumb or others'
>> studies.
>> > > >
>> > > > Finally one last observation about studies. We lead a study on
>> right
>> > angle
>> > > > corners where the measurements were taken by the respected
>> people at
>> > the
>> > > > University of Missouri (Rolla). The results of that study were
>> > > > independently confirmed by Mark Montrose with (a) a board of
>> his own
>> > > > design
>> > > > and (b) another board from our study. These results have
>> appeared in
>> > at
>> > > > least two publications. Nevertheless, take a position on right
>> angle
>> > > > corners in one of these e-mail forums and see how much
>> discussion it
>> > > > generates!! Some people's minds are made up, facts be darned!
>> > > >
>> > > > Doug Brooks
>> > > >
>> > > >
>> > > > .
>> > > > ****************************************************
>> > > > Doug Brooks, President [email protected]
>> > > > UltraCAD Design, Inc. <http://www.ultracad.com/>
>> > > >
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