-----Original Message-----
=B7=A2=BC=FE=C8=CB: Muranyi, Arpad <[email protected]>
=CA=D5=BC=FE=C8=CB: "A Signal Integrity Email list" <[email protected]=
n.COM>; "???"
<[email protected]>
=C8=D5=C6=DA: 1998=C4=EA11=D4=C218=C8=D5 0:39
=D6=F7=CC=E2: RE: [SI-LIST] : A timing question in high speed bus
Are you talking about a source synchronous clocking scheme when you say "=
The
design is to be a Synchronous clock one"? If so, the flight time falls o=
ut
from
the equation and only the skews need to be worried about. (Source
synchronous
means that both the data and the clock [strobe] are sent by the driver
device to
the receiver and they travel down the distance side by side. So it doesn=
't
matter how long it takes for the signal to get there as long as they get
there
together).
Arpad
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