With only 2 AC grounds in your bundle you can get lots of problems if you send
high dv/dt edges through that bundle. First off, you can't determine the
impedance to ground, because you don't really have a ground, you have two
signals, one carries a logic '0' and the other carries a logic '1'.
Slow the edge rates of the signals you send through the cable, if you can make
them slower than 16" you will reduce your problems, if you can make them slower
than 48" you shouldn't have any remaining problems.
If you can't slow your edge rates you need to redefine your bundle. Have at
least 1 AC ground wire and connector pin for each 5 data signals, and 1 AC
ground for each 2 clock type signals. These need to be evenly dispersed in the
connectors and evenly dispersed in the bundle. With this kind of bundle you can
start determining the impedance of the signals with respect to the AC grounds
in the bundle, and determining the reflection characteristics.
Joe
CEC Analysis and I/O Design
Phone: 507.253.0762 Fax: 507.253.4966
[email protected]
**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****