Re: [SI-LIST] : Diodes, EMC, ESD Protection networks

Gary Crowell Sr. ([email protected])
Tue, 12 May 1998 08:46:43 -0600

> 3) A Multiple VCC Supplies//Partial Power Down question. Think of
> it
> as a Bus Analyser sitting on a CPU bus.
> I have a CPU circuit (50MHz clocks...) and a monitoring Bus
> Analyser
> (not a product as such but a circuit I am developing). If power
> is
> applied to both devices, all is fine. However, if power to the
> Bus
> Analyser fails (or is turned on after the CPU circuit is turned
> on), it
> then loads the data lines on the CPU circuit corrupting
> operation. The
> loading is primarily done by the Bus Analyser's Input IC's ESD
> protection network, clamping the input to 0.7 volts above VCC,
> which in
> this case is 0 volts. The Bus Analyser's power supply has a very
> low DC
> resistance when the power is switched off due to other things.
> My question is:
> There must be thousands of circuits out there doing exactly what
> I'm
> trying to do. What do others do?
> Thanks
> Peter Baxter
> [email protected]

I have used bussed analog switches for similar test interfaces:

Their application note AN-13 might help.