- I was not able to put the caps on the same side as the component..
That's why I thought sharing vias from the power pins with that
of the decoupling capacitor will help...
The components are Altera FPGA 10K and Synchronous SRAM. The
frequency at which they are operating is 40Mhz.
Do you consider 40Mhz high ?
Someone told me sharing ground vias will cause ground loops.. I couldn't
find such a term in High Speed Digital Design book..
- One more problem which I have is that the trace lengths of
of some of the SRAM data lines from the FPGA to the SRAM are
more than 4 inches. For a PCB made of PTFE/glass and 35pf load,
Altera recommends maximum trace length of 4 inches..
I want to know if exceeding this limit by 1-1.5 inches will
cause reflections on that line i.e. from your experience, are
such limits strict..
Sorry if these questions are too basic.. I jumped into board design
without developing adequate background in high speed design..
Thanks,
Raman
>
> Raman Muthukrishnan wrote:
> > - Will there be a problem if the VCC and GROUND via from
> > the power pins of a chip are shared with the corresponding
> > vias of the decoupling capacitor placed close to those
> > power pins ? The chip is on the top layer and the decap is
> > on the bottom layer..
>
> It would be a lot better if you put the cap on the same side
> as the part. The inductance will be lower that way. The
> idea of a bypass cap is to create a low impedance source
> at the bypass point. Putting the extra via inductance in
> doesn't help that. Also, at higher frequencies if you don't
> connect the cap before you make a connection to power and
> return ("GND"), it's gonna get on 'em.
>
> Depending on your frequencies, the currents involved, the
> susceptability of other circuits, you might get away with it,
> but it isn't optimum. Unless there is a compelling reason
> not to, I'd put the cap on the same side as the part, as close
> as you can get it.
>
> The next question is, "How do you pick a decoupling cap?"
>
> --
> ---------------------------------------------------------------
> Mark Randol, RF Measurements Engineer | Motorola SPS, Inc.
> (602)413-8052 Voice | M/S EL379
> (602)413-4150 FAX | 2100 E. Elliot Road
> [email protected] | Tempe, AZ 85284
> ---------------------------------------------------------------
>