[SI-LIST] : Decoupling Capacitors

Raman Muthukrishnan ([email protected])
Sun, 12 Apr 1998 12:34:29 -0700 (PDT)


- Will there be a problem if the VCC and GROUND via from
the power pins of a chip are shared with the corresponding
vias of the decoupling capacitor placed close to those
power pins ? The chip is on the top layer and the decap is
on the bottom layer..

- What are ground loops..? Does sharing of ground vias cause
ground loops..?