RE: [SI-LIST] : internal layer routing and EMI issues

Andrew Ingraham ([email protected])
Wed, 4 Feb 1998 05:43:39 -0500

Routing clocks on an internal layer is desirable when that layer is
surrounded on BOTH sides by solid power/ground planes.

Simply moving the clock trace down one layer reduces the trace's
characteristic impedance ... now you have buried or embedded microstrip
... but one side of the trace is still exposed to the world so there is
no EMI shielding.

Routing any signal any appreciable length on a solid power or ground
plane, such that the plane is split, sounds like a bad idea with
possible consequences. Routing other traces across the split is a VERY