Re: [SI-LIST] : EMC Issues with ASIC design

Leesa Macleod ([email protected])
Wed, 3 Dec 1997 10:43:17 -0500

Hi Manix,

What sort of package are you using? Do you have GND
pins around the XTOUT pin? There has been some work reported on
radiation directly from ICs; see, for example,

Title: The determination of radiated emissions limits for integrated
circuits within telecommunications equipment
Author: Goulette-RR; Crawhall-RJ; Xavier-SK
Source: IEICE-Transactions-on-Communications.vol.E75-B, no.3;
March 1992; p.124-30.

Leesa MacLeod

email: [email protected]
PhD candidate
Electromagnetics Group
University of Toronto

> Can anyone help in identifying RFI emissions from our ASIC that runs
> at 12MHz?
> Our OEMs report that the emissions are from our ASIC only. The RFI is
> coming at the n'th harmonics of the 12MHz. We are struggling to
> suppress this by adding capacitors on the 12mA switching I/O pads of
> the ASIC, reducing the loop-area covered by the external 12MHz
> crystal circuitry, added a 47 ohms series resistor on the XTOUT pin
> of the ASIC to the crystal, grounded the shields of the interface
> connectors...and yet...there is no improvment.
> Could any of you please throw some light on this issue? Is there any
> thumb rules that we can follow to supress RFI for such end products?
> Besides this, could any of you please advise, what are the EMC
> fundamentals that we should consider while we deisgn the CMOS ASICs
> that has the gate count of less than 12K and runs at 12 to 24MHz?
> Thanks in Advance,
> Regards,
> Manix Velu.
> E-Mail: [email protected]
> Shuttle Technology Ltd.,
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