RE: [SI-LIST] : Preferred PWB impedances

Greg Edlund ([email protected])
Wed, 19 Nov 1997 09:20:24 -0500

D.C.,

I favor the output impedance specification for a driver rather than mA.
It seems that drivers from different vendors have different output
impedances for the same current rating, so specifying mA doesn't
uniquely specify an output impedance.

I agree with you about the 50 Ohm and 65 Ohm drivers. (Actually, 60
Ohms is easier to achieve when you find yourself boxed in by PWB layup.)
In addition, I would add a 60 Ohm controlled impedance, controlled edge
rate driver for cases where you have a very large number of SSOs.

Greg
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Greg Edlund, Principal Engineer
Server Product Development
Digital Equipment Corp.
129 Parker St. PKO3-1/20C
Maynard, MA 01754
(508) 493-4157 voice
(508) 493-0941 FAX
[email protected]

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From: D. C. Sessions[SMTP:[email protected]]
Sent: Tuesday, November 18, 1997 11:04 AM
To: SI-List
Subject: [SI-LIST] : Preferred PWB impedances

I had an interesting meeting late last week. VLSI is
drafting the specs for our newest I/O library and rather
than wet-finger it, we're asking for a little help in
making them meet real-world needs.

Here's the question for the floor:

If you could have only four 3.3v CMOS driver types, what
would you have. (Aside from HSTL, SSTL, etc.) One obvious
candidate is a reflected-wave driver for 50-ohm nominal
lines; that comes to about 10mA at 350mV from the rails
under worst case conditions. A 65-ohm reflected-wave
driver would run about 25% lighter, or about 8mA.
Incident-wave is another matter entirely.

SO! the floor is open for nominations. Keep in mind that
excessively strong drivers are both inherently slower and
more vulnerable to SSO degradation.

--
D. C. Sessions
[email protected]