Re: [SI-LIST] : Decoupling capacitor selection & placement

Brett Grossman ([email protected])
Wed, 29 Oct 1997 08:13:57 -0800


Just a few comments:

> 0.1 uf caps typically have a self resonate frequency, the frequency
> where a capacitor stops being a capacitor and becomes an inductor, of
> somewhere between 10 and 50 MHz depending upon lead length. Ground
> inductance usually reduces the effectiveness far below 10 MHz.
> Simply, a bypass must be large enough to supply the instantaneous di/dt
> and small enough to be below the self resonate frequency. The higher
> the current, the larger the bypass capacitor. The higher the di/dt
> (frequency) the smaller the capacitor. This frequently results in
> impossible locus of values.

It is true that you need to be concerned with capacitor effectiveness
beyond the resonant frequency, but this also applies to the resonant
frequency of the system, not just the cap self-resonant domain. All the
parasitic capacitance and inductance in the power distribution system
can combine to change the overall effectiveness of the decoupling by
changing the Q of the tank circuit created.

One other item to note, is that the effectiveness of the capacitors for
decoupling purposes still remains beyond the resonant frequency, even
though the parasitic inductance dominates. The purpose of the decoupling
caps is also to provide a low impedance path between power and ground
for return currents to get back to the source. A plot of impedance v.
frequency of the elements (check out the cap data sheets) will show the
impedance decreasing (like a capacitor) until the point of resonance,
then increasing (like an inductor) beyond the resonant frequency. Which
means you will have close to the same impedance in an equal range above
and below the resonant frequency, depending on the application this can
save you some capacitors. Of course there is a phase change that occurs,
but are you really concerned if the current is leading or lagging in
your system.

I agree whole-heartedly with Mr. Townsend's comment regarding the
capability of recent college grads to know this information fresh out of
school. I am relatively fresh out of school (3yrs), and if you would
have asked me these questions in an interview, I would have had no idea
what you were talking about. I believe part of the problem, is in
digital design classes, labs are not run in the MHz domain, and the TTL
chips used (CMOS too for that matter) will work if you connected them
with duct tape. Also, the analog courses do not typically move beyond RF
areas, and are more concerned with the function of a single BJT or FET,
than the whole system. A third item is the EMAG courses, which are
typically based in a solid-state physics realm that very few people I
have interviewed can even apply to a system level application. Why not
begin teaching transmission line theory in digital/analog/and EMAG



Brett Grossman        		            __          ___  
Intel Tooling Operations	 __        /\ \__      /\_ \  
Phone: 408-765-2619   		/\_\    ___\ \ ,_\     \//\ \  
Fax:   408-765-2518  		\/\ \ /' _ `\ \ \/    __ \ \ \	
email: [email protected] \ \ \/\ \/\ \ \ \_ /'__`\\_\ \_
				  \ \_\ \_\ \_\ \__/\  __//\____\ 
				   \/_/\/_/\/_/\/__\ \____\/____/
The views expressed are my own.                     \/____/