In the first case, the G-P stackup essentially shields
the S-S layers on either side, so you could break this
stackup into S-S-G and P-S-S and analyse it as a microstrip
configuration.
Second case is quite different from the first one.
You have to analyse it as a stripline configuration
G-S-S-S-S-P
I think the performance of the S-S-G-P-S-S stackup
would be better than the other one.
Hope it helps, best wishes
Nirmal
John Lin - TAO wrote:
>
> Hi,
> Does anybody have idea about how to calculate the impedance of
> stackup with following structures.
>
> S-S-G-P-S-S ( 6 layers).
>
> and
>
> G-S-S-S-S-P (6 layers).
>
> I checked books and tried to find equations to calculate impedance.
> However, I cannot find any.
>
> Best Regards,
>
> JOHNLIN
> CAE Engineer of EDA Department
> Digital Equipment Corp. Taiwan Branch
> Email: [email protected]
> TEL: 1-886-3-3900000 ext. 2565
-- Nirmal Jain Ansoft Corporation (412)261-3200 X29 (W) Four Station Sq., Suite 660 (412)261-471-9427(FAX) Pittsburgh, PA 15219 _________________________________________________________________________ Check out Ansoft's WWW site at http://www.ansoft.com for product information, technical support, employment opportunities, much more... -------------------------------------------------------------------------