Intel GTL+ requirements:
1. Intel uses controlled edge rate (~1nS)
2. Usually 5% tolerance pull-up termination in medium performance system; 1%
tolerance pull-up termination in high performance system
Use of proper termination strategy and a controlled impedance board solves a
great part of SI and EMI problems.
-Karthik
CMD
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Karthikeyan Ethirajan
Applications Engineer (408) 934-3181
California Micro Devices 215 Topaz Street
[email protected] Milpitas, CA 95035
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>>> John Lin - TAO <[email protected]> 07/06 6:55 PM >>>
Hi ,
Talking about signal quality. Could somebody tell me about the criteria
of overshoot, undershoot, overshoot ring back, and
undershoot ring back for TTL(5V) , CMOS(5V), LVTTL(3.3V) logic types?
Intel has provided the GTL+ (Vtt=1.5V, Vref=1.0) criterion for signal
quality.
over/under shoot =0.2*(Vtt) ,
Ringback= Vref+/-200mv.
Best Regards,
JohnLin
CAE Engineer of the EDA Department.
DEC Taiwan Branch,
Email: [email protected]
TEL: 886-3-3900000 ext. 2565
JohnLin
CAE Engineer of the EDA Department.
DEC Taiwan Branch,
Email: [email protected]
TEL: 886-3-3900000 ext. 2565