re: IBIS Models or full spice netlist...?

Howard Johnson ([email protected])
Mon, 30 Dec 96 11:16:13 PST

re: IBIS Models or full spice netlist...?

I've collected together the following information on IBIS that
may be useful to you. This comes from a combination of input from
my seminar students who use IBIS (or are trying to) and also some of
the IBIS advocates at Interconnectix (now Mentor).

It's a fairly simple, straight forward file format. It is well-suited for
use by Spice-like
(but not Spice-compliant) circuit simulation tools.

It provides for specification of a complete V-I curve for a driver in it's
HI state, another
V-I curve to represent the driver in it's LO state, and a way to morph from
one to the other at a
defined transition rate. The use of V-I curves is what gives IBIS it's
ability to model non-linear
effects like protection diodes, TTL totem-pole drivers, and emitter-follower

IBIS can be used to produce accurate, detailed simulations of high-speed
ringing and crosstalk
behavior. It can be used to examine signal behavior under worst-case rise
time conditions, something
impossible to manage with physical testing.

Lastly, because IBIS is a file format, not a procedural specification, we
can use it for lots
of stuff. Right now, it's being built into many of the tools we use on a
daily basis. Don't be
surprised if layout tools of the future calculate ringing and crosstalk
on-the-fly, as you route
traces, identifying and fixing signal integrity violations as they go,
during autoroute.

Of course, it's not perfect. There are some warts, but in my opinion, none
significant enough
to imperil IBIS' status as the best, most comprehensive, and genuinely
useful hunk of signal integrity
technology to come along in a great while. With that said, here's my list
of flaws:

First and foremost, there is a distinct lack of support for IBIS models
among many chip
vendors. And IBIS tools won't work without IBIS model files. It's true
that IBIS files may be
constructed by hand, or automatically converted from Spice circuits, but all
the translation tools in
the world won't help if you can't pry a minimum rise time number out of your
chip vendor.

IBIS doesn't gracefully handle some forms of controlled-risetime drivers,
especially those
that first switch to a wimpy-driver state, and then later switch to a
powerful, low impedance state as
the line stabilizes.

* * * END * * *

>Return-Path: <[email protected]>
>Errors-To: [email protected]
>Errors-To: [email protected]
>Subject: IBIS Models or full spice netlist...?
>To: [email protected] (Signal Integrity Mailing List)
>Date: Sun, 29 Dec 96 9:53:48 IST
>From: "Yehuda D. Yizraeli" <[email protected]>
>Reply-To: [email protected]
>Organization: Chip-Express
>Mailer: Elm [revision: 70.85]
>Hi Experts,
> Do you think, and do it in your day-by-day work, that IBIS models are
>good and detailed information for the signal integrity engineer for his
>simulation. Does those models gives ALL the information that should be used in
>those simulations..?
> Do we have any benefits from the full SPICE plus FAB decks simulation we
>can NOT achieve through our IBIS models for the input and output cells..?
> regards, yehuda
> _/_/_/ _/_/_/_/ _/ Yehuda D. Yizraeli
> _/ _/ _/
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> The ASIC Time-to-Market Solution E-Mail: [email protected]
Dr. Howard Johnson, Signal Consulting, Inc.
16541 Redmond Way, Suite 264, Redmond, WA 98052
U.S. tel (206) 556 0800 // fax 206 881 6149 // email [email protected]