Re: PCB burried capacitance

Larry Smith ([email protected])
Tue, 11 Jun 1996 08:43:07 -0700

----- Begin Included Message -----

>From [email protected] Mon Jun 10 15:47 PDT 1996
From: "Guang-Tsai Lei" <[email protected]>
Date: Mon, 10 Jun 1996 17:44:29 -0500
To: [email protected] (Larry Smith)
Subject: Re: PCB burried capacitance
Cc: [email protected]
Mime-Version: 1.0

Hi there,

It's nice to read the discussions on the si news-group email. I almost think
our EM modeling/development group here at Mayo should put some of your
questions/suggestions in the introductions of the papers we are working on.

Regarding the comments by John (there's more than one John) that
"the behavior of closely spaced power-ground plane
systems you find ... that (after some math) the equivalent inductance of the
power/ground plane system as seen by the current sink is proportional to
the inverse of the laminate material's dielectric constant, and proportional
to the power-ground plane separation [raised to some power which I can't now
recall without digging up my notes :-) ]. " This agrees with our findings
published last year. We've modeled power/ground plane structures as the
planar microwave circuits and have an analytical expression for the impedance
of an unloaded power/ground plane system which shows this result clearly. In
addition, we've found that the influence of the dielectric losses on the
impedance of a power/ground plane system is more important than that of the
conductor losses if the loss-tangent is larger than the ratio of the skin depth
to the dielectric thickness (the first approximation).

Thanks for the open discussions.


Guang-Tsai Lei

----- End Included Message -----