there are some errors in the way you describe the behaviour of the return currents
and errors in the assumption on decoupling capcitors.
Before we start I would like to say that I have been working on modelling stackup 3
for about one year for my master's degree in EMC. I have modelled stackup 3 and
compared simulations with measurements. The agreement between model in measuremnet
is good.
Your comment on stackup 1 is correct.
Your comments on stackup 2 and 3 are incorrect. Stackup 2 is a stripline transmission
line (or triplate structure). The returns currents run on top and the bottom plates
and the discontinuity of the via structure is neglible. IBM and others have used this
triplate structures in their mainframes with frequencies over 100MHz and with rise/fall
times in the order of 100ps (check out the IBM Journal of Research & Development,
available on the internet). A possible problem can occur when the top and bottom plates
are also used to distribute power, because this would couple signals and power supply.
IBM main frame stackups do not use this, they use ground-signal-sgnal-ground, although
any other reference than ground would probably be fine too.
Note that the current does not jump planes for either stackup 2 or 3.
As I have studied stackup 3 quiet intensively for the past year I can state it is not correct
to say that the return-current returns via the interplane capacitance. It is not completely
incorrect either. Rather one should say that the return current returns via the 2-dimensional
transmission line that is formed between the upper and the lower plane. Because a short, open
(rectangular) 2D line looks like a capacitance you are correct to state that the interplane
capacitance shorts the return. However, for other frequencies the 2D line can look inductive,
such that, your statement is incomplete.
With respect to shorting the power planes with capacitors I can state that common capacitors
are uncapable to provide a low enough shunt impedance to short the planes for high frequencies.
I do not mean that they have no effect, they do have in an unexpected way, by forming a tank
circuit or resonating circuit with the planes. Much depends upon the inductance of the capacitor
package and their positions. Allot of simulations are performed with ideal capacitors, however,
their behaviour is completely different from real capacitors! So conclusions based on these
data are incorrect. I have simulated boards with and without capacitors (63X 0805 ceramics) and
got the simulations and data of both configuration in good agreement, the conclusions are that
capacitors do not just remove the noise dramaticly. Actually, peak-to-peak values between both
are identical, only the respons is different because of an extra pole in the sytem respons.
Although I do not have any details of your design (I guess it is a high speed telecom switcher),
my recommendations are:
- use the triplate structure for the very high speed data, use ground-signal-signal-ground
- use small PCB dimensions and small power plane dimensions --> miniaturization
- distrubute capacitors over a grid on the PCB, connect with short breakouts
Good luck with your design.
regards,
Jan Vercammen
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